In terms of LLVM, ISPC generates vectorized types for varying types, and
scalar types for uniform. For example:
uniform int func(uniform int x, varying int y);
uniform int
run()
{
uniform int x = 1;
varying int y = programIndex;
uniform int z = func(x, y);
return z;
}
ispc test.ispc -o test_ispc.bc --emit-llvm --target=avxi32x8
llvm-dis test_ispc.bc -o test_ispc.ll
produces:
; Function Attrs: nounwind
declare i32 @func___univyi(i32, <8 x i32>, <8 x i32>) #0
for the declaration of func. a scalar i32 for the first uniform param, a
vector <8 x i32> of the second varying param, and a vector <8 x i32> for
the implict mask parameter.
-Brian
On Tuesday, March 28, 2017 at 9:38:40 AM UTC-7, timothée ewart wrote:
>
> Hello all,
>
> Dev. in SIMD since a decade ( I did ASM, intrinsics and DSL), I am now
> looking solution using IR of LLVM, ISPC is the perfect solution. However
> I am very confuse by the key world uniform/varying and their mapping in
> ASM. From the original paper "ispc : A SPMD Compiler for ...."
>
> From the paper I read: " of a variable like float x represents a variable
> with a separate storage location", I understand the compiler will allocate
> a single
> xmm register (so without SIMD). Then for uniform " which correspond to a
> single value in memory and thus, a value that is the same across all
> elements", so I
> understand for SIMD ispc will create a register (xmm,ym,...) with a single
> value inside e.g. using broadcast in SIMD.
> Finally, for "varying" keyword, I will say it allocate a SIMD register.
>
> I am correct or not.
>
> Best,
>
> Tim
>
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