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https://issues.apache.org/jira/browse/ARROW-3242?page=com.atlassian.jira.plugin.system.issuetabpanels:all-tabpanel
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Wes McKinney reassigned ARROW-3242:
-----------------------------------
Assignee: Wes McKinney
> [C++] Use coarser-grained dispatch to SIMD hash functions
> ---------------------------------------------------------
>
> Key: ARROW-3242
> URL: https://issues.apache.org/jira/browse/ARROW-3242
> Project: Apache Arrow
> Issue Type: Improvement
> Components: C++
> Reporter: Wes McKinney
> Assignee: Wes McKinney
> Priority: Major
> Fix For: 0.11.0
>
>
> The way that we dispatch to SSE4 hash functions is a remnant from the Impala
> codebase, which checks CpuInfo on every iteration in debug builds:
> https://github.com/apache/arrow/blob/master/cpp/src/arrow/util/hash-util.h#L43
> However, the static {{model_name_}} member is causing some non-determinism
> related to static member lifetime as reported in ARROW-3241.
> I'm proposing to refactor CpuInfo into a singleton pattern and handle SIMD vs
> non-SIMD dispatch at a higher level rather than at the lowest level like it
> is now. This should hopefully make the issue in ARROW-3241 go away
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