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https://issues.apache.org/jira/browse/HBASE-21874?page=com.atlassian.jira.plugin.system.issuetabpanels:comment-tabpanel&focusedCommentId=16769598#comment-16769598
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ramkrishna.s.vasudevan commented on HBASE-21874:
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{quote}Where are your going to keep bucket cache? Not in DRAM definitely, hence
in NVDIMM (PMEM)?
{quote}
Yes. The cache will reside in Pmem only.
{quote}If you keep data in PMEM and use extended FileMmapIOEngine, where do yo
you mmap it into? into DRAM? That is strange
{quote}
We use extended FileMmapIOEngine, but the mmap won't do the memmory mapping to
DRAM, it will mmap to a different address space maintained by the NVDIMM. So
even if you have less DRAM capacity still your data is served from PMEM's
address space. That is why you can use the SHARED mode in the IOEngine. Where
as in a file mmap case you will go with EXCLUSIVE - where you need to copy the
content to the onheap memory.
{quote}My question, regarding file system required on top PMEM has remained
unanswered.
You rely on file system on top of PMEM
{quote}
Pls check the description from [http://pmem.io.|http://pmem.io./]
NVDIMMs are going to be addressed as an mmap files only unlike DRAM where you
directly access the memory addresses.
{quote}You mmap PMEM resided file into RAM
{quote}
No as explained previously.
Some related links which is there in public
https://software.intel.com/en-us/blogs/2018/10/30/intel-optane-dc-persistent-memory-a-major-advance-in-memory-and-storage-architecture
> Bucket cache on Persistent memory
> ---------------------------------
>
> Key: HBASE-21874
> URL: https://issues.apache.org/jira/browse/HBASE-21874
> Project: HBase
> Issue Type: New Feature
> Components: BucketCache
> Affects Versions: 3.0.0
> Reporter: ramkrishna.s.vasudevan
> Assignee: ramkrishna.s.vasudevan
> Priority: Major
> Fix For: 3.0.0
>
> Attachments: HBASE-21874.patch, HBASE-21874.patch,
> HBASE-21874_V2.patch, Pmem_BC.png
>
>
> Non volatile persistent memory devices are byte addressable like DRAM (for
> eg. Intel DCPMM). Bucket cache implementation can take advantage of this new
> memory type and can make use of the existing offheap data structures to serve
> data directly from this memory area without having to bring the data to
> onheap.
> The patch is a new IOEngine implementation that works with the persistent
> memory.
> Note : Here we don't make use of the persistence nature of the device and
> just make use of the big memory it provides.
> Performance numbers to follow.
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