*Greetings!* * *Our* “ Santa Clara-CA, Hudson-MA & Allentown-PA ” *based client is looking for* “Pre-Silicon Functional Verification Engineer” *to fill its * Contract* opportunity.
* * *Title:* Pre-Silicon Functional Verification Engineer *Location:* Santa Clara-CA, Hudson-MA & Allentown-PA *Duration: 6+ Months*** * * *Job description*: * * *Qualification:* MS-EE / B-Tech – EE/ECE Experience Level: 4+ Years · Hands on experience in OVM or UVM methodology · Hands on experience with System Verilog · Hands on experience with Functional coverage · Ability to develop test plans will be an advantage · Overall experience atleast 7yrs of relevant experience * * *Warm Regards,* *Viduthalai Selvan (Vidu)* *First Tek, Inc.* *Direct:* 732-328-2287 *[email protected]* | *www.first-tek.com* *Ranked 31st on Deloitte 2008 NY, NJ, CT Technology Fast 50* *A 2007 Inc 500 winner for 2004-2006* *A 2007 NJ Finest winner for 2004-2006* *Ranked 4th on Deloitte 2007 Technology Fast 50 for 2002-2006*** -- You received this message because you are subscribed to the Google Groups "it req" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. To post to this group, send email to [email protected]. Visit this group at http://groups.google.com/group/it-req. For more options, visit https://groups.google.com/groups/opt_out.
