--- ivtv-0.3.2c.orig/driver/cx25840-driver.c 2005-01-06 14:05:01.000000000 +0000 +++ ivtv-0.3.2c/driver/cx25840-driver.c 2005-02-01 22:08:32.096635216 +0000 @@ -547,8 +547,8 @@ CX25840_SET_DLL1_CURRSET(0x0008), // '*' (Default 0x0000) Reg: 0x015b Start bit: 1 Bit length: 4 CX25840_SET_DLL2_COMP_LT(0x0003), // '*' (Default 0x0009) Reg: 0x015e Start bit: 1 Bit length: 3 CX25840_SET_DLL2_CURRSET(0x0003), // '*' (Default 0x0000) Reg: 0x015f Start bit: 1 Bit length: 4 - CX25840_SET_ACFG_DIS(0x0001), // 'Disable' (Default 0x0000) Reg: 0x0400 Start bit: 5 Bit length: 1 - CX25840_SET_AUTO_SC_LOCK(0x0000), // 'Manual mode. Lock speed is determined by' (Default 0x0001) Reg: 0x0401 Start bit: 4 Bit length: 1 + CX25840_SET_ACFG_DIS(0x0000), // 'Disable' (Default 0x0000) Reg: 0x0400 Start bit: 5 Bit length: 1 + CX25840_SET_AUTO_SC_LOCK(0x0001), // 'Manual mode. Lock speed is determined by' (Default 0x0001) Reg: 0x0401 Start bit: 4 Bit length: 1 CX25840_SET_COMB_NOTCH_MODE(0x0001), // 'Notch data is interpreted as chroma' (Default 0x000a) Reg: 0x0402 Start bit: 2 Bit length: 2 CX25840_SET_OUT_MODE(0x0002), // '*' (Default 0x0001) Reg: 0x0404 Start bit: 0 Bit length: 2 CX25840_SET_MODE10B(0x0001), // 'Luma and Chroma Output have 10 bits of resolution' (Default 0x0000) Reg: 0x0404 Start bit: 2 Bit length: 1 @@ -571,7 +571,7 @@ CX25840_SET_SC_STEP(0x0a8263), // '*' (Default 0x001f) Reg: 0x047c Start bit: 0 Bit length: 8 CX25840_SET_VBI_OFFSET(0x0001), // '*' (Default 0x0000) Reg: 0x047f Start bit: 0 Bit length: 5 CX25840_SET_COMB_PHASE_LIMIT(0x0014), // '*' (Default 0x0020) Reg: 0x049f Start bit: 0 Bit length: 8 - CX25840_SET_AUD_MODE_AUD_SYSTEM(0x0006), // '*' (Default 0x0000) Reg: 0x0808 Start bit: 0 Bit length: 4 + CX25840_SET_AUD_MODE_AUD_SYSTEM(0x000f), // '*' (Default 0x0000) Reg: 0x0808 Start bit: 0 Bit length: 4 CX25840_SET_AUD_STANDARD(0x000f), // '*' (Default 0x0000) Reg: 0x0808 Start bit: 4 Bit length: 4 CX25840_SET_PREF_MODE(0x0004), // '*' (Default 0x0000) Reg: 0x0809 Start bit: 0 Bit length: 4 CX25840_SET_PATH1_AVC_RMS_CON(0x0007), // '*' (Default 0x0049) Reg: 0x08d0 Start bit: 4 Bit length: 4 @@ -712,6 +712,30 @@ /* ============ SAA7715 AUDIO settings (end) ============= */ +static int cx25840_get_vid_fmt ( struct i2c_client *client ) +{ + int i = VIDEO_MODE_AUTO; + switch (read_setting(client, AFD_FMT_STAT)) { + case 0x0001: // NTSC-M + case 0x0008: // NTSC-J + case 0x0009: // NTSC-4.43 + i = VIDEO_MODE_NTSC; break; + case 0x0040: // PAL-BDGHI + case 0x0041: // PAL-M + case 0x0048: // PAL-N + case 0x0049: // PAL-NC + case 0x03e8: // PAL-60 + i = VIDEO_MODE_PAL; break; + case 0x044c: // SECAM + i = VIDEO_MODE_SECAM; break; + default: + i = -1; + break; + } + return i; +} + + static int cx25840_command (struct i2c_client *client, unsigned int cmd, void *arg) { struct cx25840_state *state = i2c_get_clientdata(client); @@ -1041,114 +1065,49 @@ setting_sequencer(client, seq); break; } - case 7: { + case 7: + case 6: { u8 seq[]={ - CX25840_TAG('T','u','n','n','e','r',' ','5','0','0'), - + CX25840_TAG('T','u','n','e','r',' ',state->input==6?'1':'5',state->input==6?'5':'0','0'), + CX25840_SET_START_MICROCNTL(0x0000), // FW stop. - CX25840_SET_SOFT_RESET(0x0001), // Soft reset assert. - CX25840_SET_VD_SOFT_RST(0x0001), // Video assert + CX25840_SET_VD_SOFT_RST(0x0001), // Assert video reset + CX25840_SET_SOFT_RESET(0x0001), // Assert soft reset CX25840_EXECUTE, CX25840_SET_CH_SEL_ADC2(0x0001), - CX25840_SET_DUAL_MODE_ADC2(0x0000), - CX25840_SET_CHIP_ACFG_DIS(0x0000), - CX25840_SET_CH_1__SOURCE(0x0006), - CX25840_SET_CH_2__SOURCE(0x0000), - CX25840_SET_CH_3__SOURCE(0x0000), // 1 for 150, 0 for 500 - CX25840_SET_AUX_PLL_POST(0x0020), - CX25840_SET_VID_FMT_SEL(0x0000), - CX25840_SET_SQ_PIXEL(0x0000), - CX25840_SET_ACFG_DIS(0x0001), - CX25840_SET_AFD_PAL_SEL(0x0000), - CX25840_SET_AFD_NTSC_SEL(0x0000), - CX25840_SET_AUD_MODE_AUD_SYSTEM(0x000f), - CX25840_SET_AUD_STANDARD(0x000f), - CX25840_SET_PREF_MODE(0x0000), - CX25840_SET_MUTE_NO_PREF_MODE(0x0000), - CX25840_SET_DE_EMPHASIS_TIME(0x0000), - CX25840_SET_FM_DEVIATION(0x0000), - CX25840_SET_FORMAT_45MHZ(0x0000), - CX25840_SET_FORMAT_65MHZ(0x0002), - CX25840_SET_TUNER_OUTPUT_FORMAT(0x0000), - CX25840_SET_PATH1_SEL_CTL(0x0000), - CX25840_SET_PATH1_AVC_RMS_CON(0x0007), - CX25840_SET_PATH1_AVC_CR(0x0000), - CX25840_SET_PATH1_AVC_STEREO(0x0001), - CX25840_SET_PATH1_AVC_AT(0x0003), - CX25840_SET_PATH1_AVC_RT(0x0006), - CX25840_SET_PATH1_AVC_CG(0x0000), - CX25840_SET_SOFT1_MUTE_EN(0x0000), - CX25840_SET_SRC1_MUTE_EN(0x0000), - CX25840_SET_SA_MUTE_EN(0x0000), - CX25840_SET_PAR_MUTE_EN(0x0000), - CX25840_SET_AC97_MUTE_EN(0x0000), - CX25840_SET_SRC3_PHASE_INC(41246400/freq_out), + CX25840_SET_DUAL_MODE_ADC2(0x0000), + CX25840_SET_CH_1__SOURCE(0x0006), + CX25840_SET_CH_2__SOURCE(0x0002), + CX25840_SET_CH_3__SOURCE(state->input==6?0x0001:0x0000), // 1 for 150, 0 for 500 + + CX25840_SET_AUX_PLL_POST(0x0018), + CX25840_SET_VID_FMT_SEL(0x0000), // Auto-select video format + CX25840_SET_AUD_STANDARD(0x000F), // Force auto-detect of audio + CX25840_SET_AUD_MODE_AUD_SYSTEM(0x000F), // Force auto-detect of audio + CX25840_SET_PREF_MODE(0x0004), // Preferred audio mode is stereo + CX25840_SET_MUTE_NO_PREF_MODE(0x0000), // Don't mute if preferred output unavailable + // Set the audio path source depending on the video mode + // TODO: This may be more dependent on the card than on the input mode + // but the input mode should be a good starting place. + CX25840_SET_PATH1_SEL_CTL(cx25840_get_vid_fmt(client)==VIDEO_MODE_NTSC?0x0002:0x0000), + CX25840_SET_SRC3_PHASE_INC(41942880/freq_out), + CX25840_SET_SOFT1_MUTE_EN(0x0001), + CX25840_SET_SRC1_MUTE_EN(0x0000), + CX25840_SET_SA_MUTE_EN(0x0000), + CX25840_SET_PAR_MUTE_EN(0x0001), + CX25840_SET_AC97_MUTE_EN(0x0001), CX25840_EXECUTE, - CX25840_SET_START_MICROCNTL(0x0001), // FW Start - CX25840_SET_SOFT_RESET(0x0000), // Deassert soft reset - CX25840_SET_VD_SOFT_RST(0x0000), // Deassert video reset - CX25840_EXECUTE, - CX25840_END}; + CX25840_SET_SOFT_RESET(0x0000), // Deassert soft reset + CX25840_SET_VD_SOFT_RST(0x0000), // Deassert video reset + CX25840_SET_START_MICROCNTL(0x0001), // FW Start + CX25840_EXECUTE, + CX25840_END}; setting_sequencer(client, seq); break; } - case 6: { - u8 seq[]={ - CX25840_TAG('T','u','n','n','e','r',' ','1','5','0'), - - CX25840_SET_START_MICROCNTL(0x0000), // FW stop. - CX25840_SET_SOFT_RESET(0x0001), // Soft reset assert. - CX25840_SET_VD_SOFT_RST(0x0001), // Video assert - CX25840_EXECUTE, - - CX25840_SET_CH_SEL_ADC2(0x0001), - CX25840_SET_DUAL_MODE_ADC2(0x0000), - CX25840_SET_CHIP_ACFG_DIS(0x0000), - CX25840_SET_CH_1__SOURCE(0x0006), - CX25840_SET_CH_2__SOURCE(0x0000), - CX25840_SET_CH_3__SOURCE(0x0001), // 1 for 150, 0 for 500 - CX25840_SET_AUX_PLL_POST(0x0020), - CX25840_SET_VID_FMT_SEL(0x0000), - CX25840_SET_SQ_PIXEL(0x0000), - CX25840_SET_ACFG_DIS(0x0001), - CX25840_SET_AFD_PAL_SEL(0x0000), - CX25840_SET_AFD_NTSC_SEL(0x0000), - CX25840_SET_AUD_MODE_AUD_SYSTEM(0x000f), - CX25840_SET_AUD_STANDARD(0x000f), - CX25840_SET_PREF_MODE(0x0000), - CX25840_SET_MUTE_NO_PREF_MODE(0x0000), - CX25840_SET_DE_EMPHASIS_TIME(0x0000), - CX25840_SET_FM_DEVIATION(0x0000), - CX25840_SET_FORMAT_45MHZ(0x0000), - CX25840_SET_FORMAT_65MHZ(0x0002), - CX25840_SET_TUNER_OUTPUT_FORMAT(0x0000), - CX25840_SET_PATH1_SEL_CTL(0x0000), - CX25840_SET_PATH1_AVC_RMS_CON(0x0007), - CX25840_SET_PATH1_AVC_CR(0x0000), - CX25840_SET_PATH1_AVC_STEREO(0x0001), - CX25840_SET_PATH1_AVC_AT(0x0003), - CX25840_SET_PATH1_AVC_RT(0x0006), - CX25840_SET_PATH1_AVC_CG(0x0000), - CX25840_SET_SOFT1_MUTE_EN(0x0000), - CX25840_SET_SRC1_MUTE_EN(0x0000), - CX25840_SET_SA_MUTE_EN(0x0000), - CX25840_SET_PAR_MUTE_EN(0x0000), - CX25840_SET_AC97_MUTE_EN(0x0000), - CX25840_SET_SRC3_PHASE_INC(41246400/freq_out), - CX25840_EXECUTE, - - CX25840_SET_START_MICROCNTL(0x0001), // FW Start - CX25840_SET_SOFT_RESET(0x0000), // Deassert soft reset - CX25840_SET_VD_SOFT_RST(0x0000), // Deassert video reset - CX25840_EXECUTE, - CX25840_END}; - - setting_sequencer(client, seq); - break; - } } } }