Branch: refs/heads/wip/arm64
Home: https://github.com/siemens/jailhouse
Commit: 3ea5ea6e39b737ab482055819ba091574e5c4d59
https://github.com/siemens/jailhouse/commit/3ea5ea6e39b737ab482055819ba091574e5c4d59
Author: Antonios Motakis <[email protected]>
Date: 2016-06-17 (Fri, 17 Jun 2016)
Changed paths:
M driver/main.c
M hypervisor/arch/arm/include/asm/jailhouse_hypercall.h
M hypervisor/arch/x86/include/asm/jailhouse_hypercall.h
M hypervisor/setup.c
Log Message:
-----------
driver: ioremap the hypervisor firmware to any kernel address
At the moment the Linux driver maps the Jailhouse binary to
JAILHOUSE_BASE. The underlying assumption is that Linux may map the
firmware (in the Linux kernel space), to the same virtual address it
has been built to run from.
This assumption is unworkable on ARMv8 processors running in AArch64
mode. Kernel memory is allocated in a high address region, that is
not addressable from EL2, where the hypervisor will run from.
This patch removes the assumption, by introducing the
JAILHOUSE_BORROW_ROOT_PT define, which signals the behavior of the
current architectures.
We also turn the entry point in the header, into an offset from the
Jailhouse load address, so we can enter the image regardless of
where it will be mapped.
Signed-off-by: Antonios Motakis <[email protected]>
Commit: d755778f7afa9ce1e75a39d66719640b402285a4
https://github.com/siemens/jailhouse/commit/d755778f7afa9ce1e75a39d66719640b402285a4
Author: Dmitry Voytik <[email protected]>
Date: 2016-06-17 (Fri, 17 Jun 2016)
Changed paths:
M driver/cell.c
M driver/main.c
Log Message:
-----------
driver: sync I-cache, D-cache and memory
Syncronize I-cache with D-cache after loading the hypervisor
image or a cell image. This must be done in arm64 according to
ARMv8 ARM spec. See page 1712, D3.4.6 "Non-cacheable accesses
and instruction caches".
This patch fixes coherency problems observed on real HW targets.
On x86 this operation is a NOP.
Signed-off-by: Dmitry Voytik <[email protected]>
Signed-off-by: Antonios Motakis <[email protected]>
[[email protected]: edited comments]
Commit: 845c88e0e7f8045f1d4defa7aa8e037739a69ae5
https://github.com/siemens/jailhouse/commit/845c88e0e7f8045f1d4defa7aa8e037739a69ae5
Author: Antonios Motakis <[email protected]>
Date: 2016-06-17 (Fri, 17 Jun 2016)
Changed paths:
M hypervisor/arch/arm/lib.c
M hypervisor/arch/x86/apic.c
M hypervisor/arch/x86/control.c
M hypervisor/include/jailhouse/printk.h
M hypervisor/include/jailhouse/processor.h
M hypervisor/printk.c
Log Message:
-----------
core: make phys_processor_id() return unsigned long
32 bits ought not be enough for anybody.
Signed-off-by: Antonios Motakis <[email protected]>
Commit: cd00120e3e00c64a3d8c7cd438419b7a597b253b
https://github.com/siemens/jailhouse/commit/cd00120e3e00c64a3d8c7cd438419b7a597b253b
Author: Antonios Motakis <[email protected]>
Date: 2016-06-17 (Fri, 17 Jun 2016)
Changed paths:
M hypervisor/control.c
Log Message:
-----------
core: panic_stop: print current cell only if it has been set
Currently during a panic, panic_stop will print the current cell
on the CPU where the panic occurred. However, if the hypervisor
panics sufficiently early during initialization, we may end up in
a situation where the root cell has not been initialized. This can
easily cause a trap loop, making the panic output less useful.
Signed-off-by: Antonios Motakis <[email protected]>
Commit: 90c9dc6e702aa20bcdcba6ff47a1a5041f613797
https://github.com/siemens/jailhouse/commit/90c9dc6e702aa20bcdcba6ff47a1a5041f613797
Author: Jan Kiszka <[email protected]>
Date: 2016-06-17 (Fri, 17 Jun 2016)
Changed paths:
M hypervisor/arch/arm/include/asm/paging.h
M hypervisor/arch/x86/include/asm/paging.h
M hypervisor/include/jailhouse/paging.h
M hypervisor/paging.c
Log Message:
-----------
core: Add support for aligned page allocation
Refactor page_alloc to page_alloc_internal which accepts an additional
constraint for its allocation: align_mask. The allocated region will now
have its start page chosen so that page_number & align_mask is zero. If
no alignment is required, align_mask just needs to be set to 0. This is
what page_alloc exploits.
However, the new function page_alloc_aligned is introduces to return
page regions aligned according to their size (num pages will be aligned
by num * PAGE_SIZE). This implied that num needs to be a power of two.
This will be used on the AArch64 port of Jailhouse to support physical
address ranges from 40 to 44 bits: in these configurations, the initial
page table level may take up multiple consecutive pages.
Based on patch by Antonios Motakis.
Signed-off-by: Jan Kiszka <[email protected]>
Commit: 727c448a98faf47cf365edb8c6f1b4bb3511e28e
https://github.com/siemens/jailhouse/commit/727c448a98faf47cf365edb8c6f1b4bb3511e28e
Author: Antonios Motakis <[email protected]>
Date: 2016-06-17 (Fri, 17 Jun 2016)
Changed paths:
M hypervisor/arch/arm/irqchip.c
Log Message:
-----------
arm: pass SPIs with large ids to the root cell
The current design for cell configuration files, defines the SPIs
to be passed to a cell as 64 bit bitmap. In order to use Jailhouse
on targets that have SPI ids larger than 64, we need to work
around this limitation.
Pass large SPIs to the root cell for now. A permanent solution to
this problem will need to tackle the cell configuration format.
Signed-off-by: Antonios Motakis <[email protected]>
Commit: 196ebcb26032df3d46c67db171f68d62ee5f98fe
https://github.com/siemens/jailhouse/commit/196ebcb26032df3d46c67db171f68d62ee5f98fe
Author: Claudio Fontana <[email protected]>
Date: 2016-06-17 (Fri, 17 Jun 2016)
Changed paths:
M hypervisor/arch/arm/lib.c
M hypervisor/lib.c
Log Message:
-----------
core: lib: replace ARM memcpy implementation with generic version
Remove the memcpy implementation from the ARM port, and add a
generic version to the core library for all architectures.
Signed-off-by: Claudio Fontana <[email protected]>
Signed-off-by: Antonios Motakis <[email protected]>
[[email protected]: removed all signs of weakness!]
Commit: 72ec42c1b305c56dbd45edfabe47833045f90002
https://github.com/siemens/jailhouse/commit/72ec42c1b305c56dbd45edfabe47833045f90002
Author: Antonios Motakis <[email protected]>
Date: 2016-06-17 (Fri, 17 Jun 2016)
Changed paths:
M hypervisor/arch/arm/include/asm/control.h
M hypervisor/arch/arm/include/asm/percpu.h
M hypervisor/arch/arm/lib.c
M hypervisor/arch/arm/psci.c
M hypervisor/arch/arm/setup.c
Log Message:
-----------
arm: psci: support multiple affinity levels in MPIDR
PSCI actually takes CPU parameters by the MPIDR id, which may
differ from the logical id of the CPU. This patch is the first step
into properly handling the CPU affinity levels in the MPIDR.
Signed-off-by: Antonios Motakis <[email protected]>
Commit: c5f33b1832583dc1d4e715789efadd4d0f90a1b7
https://github.com/siemens/jailhouse/commit/c5f33b1832583dc1d4e715789efadd4d0f90a1b7
Author: Antonios Motakis <[email protected]>
Date: 2016-06-17 (Fri, 17 Jun 2016)
Changed paths:
M hypervisor/arch/arm/include/asm/psci.h
M hypervisor/arch/arm/traps.c
Log Message:
-----------
arm: replace IS_PSCI_FN macro with more explicit versions
The previous version of the macro allows for more false positives
than necessary.
Replace the macro with IS_PSCI_32 and IS_PSCI_UBOOT macros, that
explicitly check for the 32 bit PSCI IDs, and the PSCI 0.1 IDs
used by uboot. ARMv8 will need an additinal check for the IDs
of 64 bit PSCI functions.
Signed-off-by: Antonios Motakis <[email protected]>
Commit: 1539a17d774dac3155d7e7fce5bf03c851a92329
https://github.com/siemens/jailhouse/commit/1539a17d774dac3155d7e7fce5bf03c851a92329
Author: Antonios Motakis <[email protected]>
Date: 2016-06-17 (Fri, 17 Jun 2016)
Changed paths:
M hypervisor/arch/arm/gic-common.c
M hypervisor/arch/arm/gic-v3.c
M hypervisor/arch/arm/include/asm/gic_common.h
M hypervisor/arch/arm/include/asm/gic_v3.h
Log Message:
-----------
arm: move the handle_irq_route function to the GICv3 module
The handle_irq_route function is not needed with the GICv2.
On the ARMv8 port we will not assign a virt_id to each CPU,
opting to use the MPIDR as much as we can from the start.
GICv3 will need heavier refactoring for this purpose; by moving
this function we can reuse the GICv2 code on ARMv8.
Signed-off-by: Antonios Motakis <[email protected]>
Commit: 2d36c2e8cc3ff5ef97b61dd998bd49d9041fcafb
https://github.com/siemens/jailhouse/commit/2d36c2e8cc3ff5ef97b61dd998bd49d9041fcafb
Author: Antonios Motakis <[email protected]>
Date: 2016-06-17 (Fri, 17 Jun 2016)
Changed paths:
M hypervisor/arch/arm/include/asm/paging.h
M hypervisor/arch/arm/include/asm/paging_modes.h
M hypervisor/arch/arm/mmu_cell.c
M hypervisor/arch/arm/paging.c
Log Message:
-----------
arm: prepare port for 48 bit PARange support
We currently support 3 levels of page tables for a 39 bits PA range
on ARM. This patch implements support for 4 level page tables,
and 3 level page tables with a concatenated level 1 root page
table.
On AArch32 we stick with the current restriction of building for
a 39 bit physical address space; however this change will allow
us to support a 40 to 48 bit PARange on AArch64.
Signed-off-by: Antonios Motakis <[email protected]>
Commit: 3ebf8693c5757e78f2b2f0599fc4365018787d5e
https://github.com/siemens/jailhouse/commit/3ebf8693c5757e78f2b2f0599fc4365018787d5e
Author: Antonios Motakis <[email protected]>
Date: 2016-06-17 (Fri, 17 Jun 2016)
Changed paths:
M hypervisor/arch/arm/include/asm/paging.h
M hypervisor/arch/arm/mmu_cell.c
Log Message:
-----------
arm: put the value of VTCR for cells in a define
We can reuse the code under hypervisor/arch/arm/mmu_cell.c for the
AArch64 port, save for the value we use for the VTCRL. AArch64 will
need in addition to the flags set by the AArch32 port, to set the
size of the address space.
We put this behind a define in asm/paging.h to allow this reuse.
Signed-off-by: Antonios Motakis <[email protected]>
Commit: 35c4b23440901d72606eee741a6d9f65cf3046f8
https://github.com/siemens/jailhouse/commit/35c4b23440901d72606eee741a6d9f65cf3046f8
Author: Antonios Motakis <[email protected]>
Date: 2016-06-17 (Fri, 17 Jun 2016)
Changed paths:
M hypervisor/arch/arm/include/asm/processor.h
M hypervisor/arch/arm/mmu_cell.c
Log Message:
-----------
arm: hide TLB flush behind a macro
Hide TLB flushes issues by the MMU code behind a macro, so we can
increase our chances of reusing some of this code.
Signed-off-by: Antonios Motakis <[email protected]>
Commit: 428d1b0c842454767380c092b45236120327726a
https://github.com/siemens/jailhouse/commit/428d1b0c842454767380c092b45236120327726a
Author: Antonios Motakis <[email protected]>
Date: 2016-06-17 (Fri, 17 Jun 2016)
Changed paths:
A hypervisor/arch/arm64/include/asm/sysregs.h
Log Message:
-----------
arm64: add sysregs helper macros
On the AArch32 port of Jailhouse, the arm_write_sysreg and
arm_read_sysreg macros are used to access the system registers.
Implementing these helpers on AArch64 allows to approach some low
hanging fruit when looking for code to reuse from the AArch32 port.
On AArch64 we always get a u64 value from a system register, while
on AArch32 it might be either u32 or u64. We need to look at the
users of this macro on a case by case basis and see if it makes
sense to reuse code.
Signed-off-by: Antonios Motakis <[email protected]>
Commit: 0df97c72793ce4e901359b05c3d9018b4f67e594
https://github.com/siemens/jailhouse/commit/0df97c72793ce4e901359b05c3d9018b4f67e594
Author: Antonios Motakis <[email protected]>
Date: 2016-06-17 (Fri, 17 Jun 2016)
Changed paths:
A hypervisor/arch/arm64/include/asm/processor.h
Log Message:
-----------
arm64: add asm/processor.h header for AArch64
Add an initial asm/processor.h header for AArch64. This header
is similar to the version for AArch32, but e.g. processor modes
and exception classes differ.
Signed-off-by: Antonios Motakis <[email protected]>
Commit: 02a530ca7c6647765af0daea7117e4120c7d11c4
https://github.com/siemens/jailhouse/commit/02a530ca7c6647765af0daea7117e4120c7d11c4
Author: Dmitry Voytik <[email protected]>
Date: 2016-06-17 (Fri, 17 Jun 2016)
Changed paths:
A hypervisor/arch/arm64/include/asm/control.h
Log Message:
-----------
arm64: add control.h header file
Add the header file control.h to the AArch64 port of Jailhouse.
Signed-off-by: Dmitry Voytik <[email protected]>
Signed-off-by: Antonios Motakis <[email protected]>
[[email protected]: split off as a separate patch]
Commit: 953a0318379c932c8abfe15e45722d8d80e42c32
https://github.com/siemens/jailhouse/commit/953a0318379c932c8abfe15e45722d8d80e42c32
Author: Antonios Motakis <[email protected]>
Date: 2016-06-17 (Fri, 17 Jun 2016)
Changed paths:
A hypervisor/arch/arm64/include/asm/paging.h
Log Message:
-----------
arm64: add definitions for the AArch64 page table format
The AArch64 page table format is very similar, almost identical to
the AArch32 page table format. Add a header file for the AArch64 page
table format, based on the AArch32 implementation.
AArch64 introduces an extra level of page tables, for a total of
four, and support for different translation granule sizes.
Sticking to a granule size of 4Kb, we end up with an identical page
table format to AArch32. Using either 3 or the full 4 supported
levels of page tables, we can reach a physical address range of
48 bits.
Signed-off-by: Antonios Motakis <[email protected]>
Commit: f8cce8d3f88169f188405bb715702f50080a28e3
https://github.com/siemens/jailhouse/commit/f8cce8d3f88169f188405bb715702f50080a28e3
Author: Dmitry Voytik <[email protected]>
Date: 2016-06-17 (Fri, 17 Jun 2016)
Changed paths:
A hypervisor/arch/arm64/include/asm/types.h
Log Message:
-----------
arm64: add types.h
Add the asm/types.h header file, which defines the size of the data
types.
Signed-off-by: Dmitry Voytik <[email protected]>
Commit: 1abbfe6bc82cacac5a20d12a7c4e46a87082afd8
https://github.com/siemens/jailhouse/commit/1abbfe6bc82cacac5a20d12a7c4e46a87082afd8
Author: Antonios Motakis <[email protected]>
Date: 2016-06-17 (Fri, 17 Jun 2016)
Changed paths:
A hypervisor/arch/arm64/include/asm/spinlock.h
Log Message:
-----------
arm64: spinlock implementation
Implement spinlocks for the hypervisor firmware, on AArch64.
Signed-off-by: Antonios Motakis <[email protected]>
Commit: fca539e65997b01380c279c95dab179949a6220d
https://github.com/siemens/jailhouse/commit/fca539e65997b01380c279c95dab179949a6220d
Author: Claudio Fontana <[email protected]>
Date: 2016-06-17 (Fri, 17 Jun 2016)
Changed paths:
A hypervisor/arch/arm64/include/asm/bitops.h
Log Message:
-----------
arm64: implement bitops
implement set_bit, clear_bit, test_and_set_bit.
test_and_set_bit is used only in the panic_printk apparently,
while set_bit and clear_bit are used in page table handling code.
Signed-off-by: Claudio Fontana <[email protected]>
Commit: 01b645205668a8b4204d1ba8fe1467dc45a9cb86
https://github.com/siemens/jailhouse/commit/01b645205668a8b4204d1ba8fe1467dc45a9cb86
Author: Antonios Motakis <[email protected]>
Date: 2016-06-17 (Fri, 17 Jun 2016)
Changed paths:
A hypervisor/arch/arm64/include/asm/percpu.h
Log Message:
-----------
arm64: add percpu.h header file
Add the percpu.h header file for the AArch64 implementation. This is
the bare bones version of the header needed to compile a stub
hypervisor binary on AArch64. A lot of these fields could probably
be moved to an arch independent header.
Signed-off-by: Antonios Motakis <[email protected]>
Commit: 634d4b83eacc0fe0f01f4e4e6f09cb0ad9747580
https://github.com/siemens/jailhouse/commit/634d4b83eacc0fe0f01f4e4e6f09cb0ad9747580
Author: Antonios Motakis <[email protected]>
Date: 2016-06-17 (Fri, 17 Jun 2016)
Changed paths:
A hypervisor/arch/arm64/include/asm/cell.h
Log Message:
-----------
arm64: add cell.h header file
Add the initial cell.h header file needed to build on AArch64.
Signed-off-by: Antonios Motakis <[email protected]>
Commit: 708e62da6cfcebbc34ae59aba91a94a12724c401
https://github.com/siemens/jailhouse/commit/708e62da6cfcebbc34ae59aba91a94a12724c401
Author: Antonios Motakis <[email protected]>
Date: 2016-06-17 (Fri, 17 Jun 2016)
Changed paths:
A hypervisor/arch/arm64/include/asm/jailhouse_hypercall.h
Log Message:
-----------
arm64: add jailhouse_hypercall.h header file
Add the jailhouse_hypercall.h header file for AArch64. We will need
this also from the Linux side, in order to load Jailhouse in memory
and to issue hypercalls to an already loaded instance of the
hypervisor.
Signed-off-by: Antonios Motakis <[email protected]>
Commit: ec17e40f7c1d4e1af63cf87a62d4240dccdb6627
https://github.com/siemens/jailhouse/commit/ec17e40f7c1d4e1af63cf87a62d4240dccdb6627
Author: Antonios Motakis <[email protected]>
Date: 2016-06-17 (Fri, 17 Jun 2016)
Changed paths:
M hypervisor/Makefile
A hypervisor/arch/arm64/Makefile
A hypervisor/arch/arm64/asm-defines.c
A hypervisor/arch/arm64/caches.S
A hypervisor/arch/arm64/control.c
A hypervisor/arch/arm64/entry.S
M hypervisor/arch/arm64/include/asm/control.h
A hypervisor/arch/arm64/include/asm/head.h
M hypervisor/arch/arm64/include/asm/percpu.h
A hypervisor/arch/arm64/include/asm/platform.h
A hypervisor/arch/arm64/mmio.c
A hypervisor/arch/arm64/setup.c
A inmates/demos/arm64/Makefile
A inmates/lib/arm64/Makefile
A inmates/tools/arm64/Makefile
Log Message:
-----------
arm64: minimum stubs to allow building on AArch64
Add the minimum stub functions expected by the rest of the codebase
to enable building on AArch64. We may implement the missing AArch64
functionality from here.
Signed-off-by: Antonios Motakis <[email protected]>
Commit: 8cb6e9b5a3e7495bbf6e099e1abdaba1c6497a80
https://github.com/siemens/jailhouse/commit/8cb6e9b5a3e7495bbf6e099e1abdaba1c6497a80
Author: Antonios Motakis <[email protected]>
Date: 2016-06-17 (Fri, 17 Jun 2016)
Changed paths:
A configs/foundation-v8.c
M hypervisor/arch/arm64/include/asm/platform.h
Log Message:
-----------
config: add root cell configuration for the ARMv8 Foundation model
Add under config/foundation-v8.c a root cell configuration for the
ARMv8 Foundation model, so we can in use this target with Jailhouse.
We also add the neccessary parameters in asm/platform.h for this
model.
Signed-off-by: Antonios Motakis <[email protected]>
Commit: 767e3f247cf9ce85363db4b187e89c679f1b82f5
https://github.com/siemens/jailhouse/commit/767e3f247cf9ce85363db4b187e89c679f1b82f5
Author: Antonios Motakis <[email protected]>
Date: 2016-06-17 (Fri, 17 Jun 2016)
Changed paths:
A ci/jailhouse-config-amd-seattle.h
A configs/amd-seattle.c
M hypervisor/arch/arm/include/asm/uart_pl011.h
M hypervisor/arch/arm64/include/asm/platform.h
Log Message:
-----------
config: root cell configuration for the AMD Seattle
Add the root cell configuration and necessary headers to build
and run Jailhouse on the AMD Seattle development board.
Signed-off-by: Antonios Motakis <[email protected]>
Commit: 550d35c70e60283ce50f7c883893ae8dd6f46a4e
https://github.com/siemens/jailhouse/commit/550d35c70e60283ce50f7c883893ae8dd6f46a4e
Author: Antonios Motakis <[email protected]>
Date: 2016-06-17 (Fri, 17 Jun 2016)
Changed paths:
M hypervisor/arch/arm64/caches.S
Log Message:
-----------
arm64: implement data cache flush
The arch_paging_flush_cpu_caches function is needed early on
during initialization, in order to flush the early bootstrap
page tables for they hypervisor.
Signed-off-by: Antonios Motakis <[email protected]>
Commit: 5c74f8c80bf3309f16e451f3ec53b9251e87213f
https://github.com/siemens/jailhouse/commit/5c74f8c80bf3309f16e451f3ec53b9251e87213f
Author: Antonios Motakis <[email protected]>
Date: 2016-06-17 (Fri, 17 Jun 2016)
Changed paths:
M hypervisor/arch/arm64/entry.S
A hypervisor/arch/arm64/include/asm/sections.h
Log Message:
-----------
arm64: initialize EL2 for hypervisor entry
Unlike AArch32, we jump to EL2 as soon as we enter the hypervisor
binary.
In order to do that, we also need to switch on the MMU, so we
generate early bootstrap page tables.
We need these in order to perform unaligned accesses from the
hypervisor binary during early initialization, and to avoid having
to maintain the caches during initialization.
Signed-off-by: Antonios Motakis <[email protected]>
Signed-off-by: Dmitry Voytik <[email protected]>
Commit: ff9214b3d2f68393dc7773df96f5b136c98be48c
https://github.com/siemens/jailhouse/commit/ff9214b3d2f68393dc7773df96f5b136c98be48c
Author: Antonios Motakis <[email protected]>
Date: 2016-06-17 (Fri, 17 Jun 2016)
Changed paths:
M hypervisor/arch/arm64/entry.S
M hypervisor/arch/arm64/include/asm/percpu.h
Log Message:
-----------
arm64: initialize the hypervisor for entry
Initialize the hypervisor firmware, so we can finally enter
the arch independent entry() function. This includes setting
up a stack, and saving the state of the processor before
entering the hypervisor.
Signed-off-by: Antonios Motakis <[email protected]>
Commit: b766540cb65df589d6dde87adfe4ec758000847e
https://github.com/siemens/jailhouse/commit/b766540cb65df589d6dde87adfe4ec758000847e
Author: Antonios Motakis <[email protected]>
Date: 2016-06-17 (Fri, 17 Jun 2016)
Changed paths:
M hypervisor/arch/arm64/Makefile
M hypervisor/arch/arm64/entry.S
A hypervisor/arch/arm64/exception.S
A hypervisor/arch/arm64/include/asm/traps.h
A hypervisor/arch/arm64/traps.c
Log Message:
-----------
arm64: initial exception handling and catch EL2 aborts
Catch exceptions on the AArch64 target of Jailhouse. Catch and aborts
from EL2 that might be caused by the hypervisor.
Signed-off-by: Antonios Motakis <[email protected]>
Signed-off-by: Dmitry Voytik <[email protected]>
Commit: 688b62a18a84d92feb6e4d708294e2b845256398
https://github.com/siemens/jailhouse/commit/688b62a18a84d92feb6e4d708294e2b845256398
Author: Dmitry Voytik <[email protected]>
Date: 2016-06-17 (Fri, 17 Jun 2016)
Changed paths:
M hypervisor/arch/arm64/traps.c
Log Message:
-----------
arm64: dump stack on unhandled exceptions
Dump stack in the following cases:
* exception in EL2. We can determine the stack size
* unhandled exceptions in EL1/0. We can't determine the stack
size thus we just print 512 bytes.
For EL2 exceptions the debug output will be like this:
FATAL: Unhandled HYP exception: synchronous abort from EL2
pc: 00000000fc00469c lr: 00000000fc004688 spsr: 200003c9 EL2
sp: 00000000fc015e30 esr: 25 1 0000044
x0: ffffffff00000000 x1: 0000000000000001 x2: 00000000fc00bd14
x3: ffffff80ffffffc8 x4: 00000000fc010000 x5: 0000000000000004
x6: ffffffc000afe000 x7: 00000000ffffe188 x8: 0000000000005d25
x9: 0000000000000001 x10: ffffffc035766a40 x11: ffffffbdc2d23f80
x12: 0000000000000862 x13: 0000007f92bd7cb0 x14: 0000007f92a67bc8
x15: 0000000000005798 x16: ffffffc0000a2794 x17: 0000000000412288
x18: 0000000000000000 x19: 0000000001930047 x20: 0000000000000004
x21: 0000000000000001 x22: 0000000000000001 x23: 00000000fc015eb8
x24: 00000000000001c0 x25: 0000000000000000 x26: ffffffc000afe6d8
x27: ffffffc035470000 x28: ffffffc034e08000 x29: 00000000fc015e30
Hypervisor stack before exception (0x00000000fc015e30 - 0x00000000fc016000):
5e20: fc015e90 00000000 fc00a298 00000000
5e40: fc015f00 00000000 fc015000 00000000 00559cb8 ffffffc0 00b69000 ffffffc0
5e60: 00b00000 ffffffc0 000001c0 00000000 0000001e 00000000 fc015cf5 00000000
5e80: fc015e90 00000000 0000001e 001e0100 fc015ee0 00000000 fc00a3b0 00000000
5ea0: fc015f00 00000000 fc00b478 00000000 fc015ee0 00000000 fc015f08 00000000
5ec0: 93930047 00000000 200001c5 00000000 00310820 ffffffc0 34e0bbc0 ffffffc0
5ee0: 00000000 00000000 fc009c54 00000000 00040000 00000000 00b00ea0 ffffffc0
5f00: 00000001 00000000 00000f00 ffffff80 00000004 00000000 00000040 00000000
5f20: 00b00ee0 ffffffc0 00559cc0 ffffffc0 00000004 00000000 00afe000 ffffffc0
5f40: ffffe188 00000000 00005d25 00000000 00000001 00000000 35766a40 ffffffc0
5f60: c2d23f80 ffffffbd 00000862 00000000 92bd7cb0 0000007f 92a67bc8 0000007f
5f80: 00005798 00000000 000a2794 ffffffc0 00412288 00000000 00000000 00000000
5fa0: 00040000 00000000 00b00ea0 ffffffc0 00559cb8 ffffffc0 00b69000 ffffffc0
5fc0: 00b00000 ffffffc0 000001c0 00000000 00000000 00000000 00afe6d8 ffffffc0
5fe0: 35470000 ffffffc0 34e08000 ffffffc0 34e0bbc0 ffffffc0 003107fc ffffffc0
6000: 8008a800
Signed-off-by: Dmitry Voytik <[email protected]>
Commit: 48e6c30f335aa4a0bb78112186e69813600faf58
https://github.com/siemens/jailhouse/commit/48e6c30f335aa4a0bb78112186e69813600faf58
Author: Antonios Motakis <[email protected]>
Date: 2016-06-17 (Fri, 17 Jun 2016)
Changed paths:
A hypervisor/arch/arm64/include/asm/setup.h
M hypervisor/arch/arm64/setup.c
Log Message:
-----------
arm64: plug the hypervisor mmu code
Enable the MMU mappings for the hypervisor running in EL2, and add
functions to map device regions to the hypervisor address space.
Signed-off-by: Antonios Motakis <[email protected]>
Commit: 832f4023a1f79992d5bf4f7689935d1c8906609b
https://github.com/siemens/jailhouse/commit/832f4023a1f79992d5bf4f7689935d1c8906609b
Author: Antonios Motakis <[email protected]>
Date: 2016-06-17 (Fri, 17 Jun 2016)
Changed paths:
M hypervisor/arch/arm64/include/asm/traps.h
M hypervisor/arch/arm64/mmio.c
M hypervisor/arch/arm64/traps.c
Log Message:
-----------
arm64: handle accesses to emulated mmio regions
Catch accesses to the mmio regions that we want to handle from the
hypervisor. These are used also by the GIC code.
Signed-off-by: Antonios Motakis <[email protected]>
Signed-off-by: Dmitry Voytik <[email protected]>
Commit: 96b3ec16d9339afbf7f4a9f19790fbbd59ea186a
https://github.com/siemens/jailhouse/commit/96b3ec16d9339afbf7f4a9f19790fbbd59ea186a
Author: Antonios Motakis <[email protected]>
Date: 2016-06-17 (Fri, 17 Jun 2016)
Changed paths:
M hypervisor/arch/arm64/Makefile
M hypervisor/arch/arm64/control.c
M hypervisor/arch/arm64/include/asm/cell.h
M hypervisor/arch/arm64/include/asm/percpu.h
M hypervisor/arch/arm64/mmio.c
M hypervisor/arch/arm64/setup.c
M hypervisor/arch/arm64/traps.c
Log Message:
-----------
arm64: plug the irqchip and GICv2 code from AArch32
We plug the irqchip handling code, and the GICv2 implementation from
AArch32.
GICv3 is slightly trickier; it makes heavier use of the sysregs, so
we will need to review more carefully that the sysregs macros do
the right thing.
Signed-off-by: Antonios Motakis <[email protected]>
Commit: bd30a2824d90d1622c25e141a8d69d1be604fa41
https://github.com/siemens/jailhouse/commit/bd30a2824d90d1622c25e141a8d69d1be604fa41
Author: Antonios Motakis <[email protected]>
Date: 2016-06-17 (Fri, 17 Jun 2016)
Changed paths:
M hypervisor/arch/arm/include/asm/psci.h
M hypervisor/arch/arm/psci.c
M hypervisor/arch/arm64/Makefile
M hypervisor/arch/arm64/control.c
M hypervisor/arch/arm64/include/asm/percpu.h
A hypervisor/arch/arm64/psci_low.S
M hypervisor/arch/arm64/setup.c
M hypervisor/arch/arm64/traps.c
Log Message:
-----------
arm64: PSCI support for SMP on AArch64
On AArch64 we pretty much rely on PSCI being present for SMP
support (turning multiple cores on and off). This patch implements
the helpers needed for SMP and plugs in the PSCI code from AArch32.
On AArch64 PSCI calls can be issued via SVC64 hypercalls as well,
contrary to AArch32 which uses SVC32 calls only. We add the changes
necessary to support the hypercalls that are used by a Linux root
cell. CPU hotplug now is still working after we enable Jailhouse.
Signed-off-by: Antonios Motakis <[email protected]>
Commit: e21d3c72d26c268d056999e41ad066b3fb837da6
https://github.com/siemens/jailhouse/commit/e21d3c72d26c268d056999e41ad066b3fb837da6
Author: Antonios Motakis <[email protected]>
Date: 2016-06-17 (Fri, 17 Jun 2016)
Changed paths:
M hypervisor/arch/arm64/setup.c
Log Message:
-----------
arm64: reanimate the root cell back from the dead
We have now enough implemented functionality to return to the root
cell. We just need to enable guest traps, which will be handled by
the MMU, MMIO, and GIC code we already plugged to the port. Finally,
we restore the state of the root cell that we previously stored in
the stack.
Signed-off-by: Antonios Motakis <[email protected]>
Commit: 16ad6beaafce0453b584f3517e77e2a85bee8375
https://github.com/siemens/jailhouse/commit/16ad6beaafce0453b584f3517e77e2a85bee8375
Author: Antonios Motakis <[email protected]>
Date: 2016-06-17 (Fri, 17 Jun 2016)
Changed paths:
M hypervisor/arch/arm64/traps.c
Log Message:
-----------
arm64: hande hypercalls from the cells
Plug in the core handler for hypercalls, so we can start implementing
the more interesting stuff.
Signed-off-by: Antonios Motakis <[email protected]>
Commit: 3b51a4aca51b93d5a34ae75238d4bff4748dc0db
https://github.com/siemens/jailhouse/commit/3b51a4aca51b93d5a34ae75238d4bff4748dc0db
Author: Antonios Motakis <[email protected]>
Date: 2016-06-17 (Fri, 17 Jun 2016)
Changed paths:
M hypervisor/arch/arm64/control.c
M hypervisor/arch/arm64/entry.S
M hypervisor/arch/arm64/include/asm/percpu.h
M hypervisor/arch/arm64/setup.c
M hypervisor/arch/arm64/traps.c
Log Message:
-----------
arm64: hypervisor disable support
Add hypervisor disable support to the Jailhouse firmware. Handle
Jailhouse disable calls from the root cell, and also disable the
hypervisor in case of an error during initialization.
Signed-off-by: Antonios Motakis <[email protected]>
Commit: 39ebd2e5a16f0a7360f83e582392a0f663cd954c
https://github.com/siemens/jailhouse/commit/39ebd2e5a16f0a7360f83e582392a0f663cd954c
Author: Antonios Motakis <[email protected]>
Date: 2016-06-17 (Fri, 17 Jun 2016)
Changed paths:
M hypervisor/arch/arm64/control.c
M hypervisor/include/jailhouse/control.h
Log Message:
-----------
arm64: implement cell control infrastructure
This patch mostly implements the functionality needed to create
and control new cells. The functionality is very similar to the
one from AArch32, and there is potential to unify some code in
the future between the architectures.
Signed-off-by: Antonios Motakis <[email protected]>
Commit: abd2d0970ec52da418038d1cabb48ef65cb54476
https://github.com/siemens/jailhouse/commit/abd2d0970ec52da418038d1cabb48ef65cb54476
Author: Dmitry Voytik <[email protected]>
Date: 2016-06-17 (Fri, 17 Jun 2016)
Changed paths:
A scripts/arm64-parsedump.py
Log Message:
-----------
tools: arm64: add exception dump parser
Add ./scripts/arm64-parsedump.py tool. This tool decodes an ARM64
exception dump and prints human-readable stack trace like this:
[0x00000000fc008688] arch_handle_dabt mmio.c:97
[0x00000000fc009acc] arch_handle_trap traps.c:143
The tool can read dumps from files (passed via -f parameter)
or from stdin stream (which can be also piped-in).
Signed-off-by: Dmitry Voytik <[email protected]>
Commit: 3b79cbb17c563a6cfadac28d530b28931ca24708
https://github.com/siemens/jailhouse/commit/3b79cbb17c563a6cfadac28d530b28931ca24708
Author: Jan Kiszka <[email protected]>
Date: 2016-06-17 (Fri, 17 Jun 2016)
Changed paths:
M .travis.yml
M ci/build-all-configs.sh
M ci/gen-kernel-build.sh
A ci/kernel-config-amd-seattle
Log Message:
-----------
ci: Add support for arm64
This adds arm64 to CI via the AMD Seattle configuration.
Signed-off-by: Jan Kiszka <[email protected]>
Commit: 659c17c79edb53281df25ec7007d225155387411
https://github.com/siemens/jailhouse/commit/659c17c79edb53281df25ec7007d225155387411
Author: Antonios Motakis <[email protected]>
Date: 2016-06-17 (Fri, 17 Jun 2016)
Changed paths:
M inmates/demos/arm/uart-demo.c
M inmates/lib/arm/include/inmate.h
Log Message:
-----------
inmates: arm: uart-demo: move heartbeat to header file
Moving the heartbeat function to a header file, so we can reuse
the uart-demo just by reimplementing the heartbeat on AArch64.
Signed-off-by: Antonios Motakis <[email protected]>
Commit: 40827fc50ae12c92baf1fea1274fc2cab75a4260
https://github.com/siemens/jailhouse/commit/40827fc50ae12c92baf1fea1274fc2cab75a4260
Author: Antonios Motakis <[email protected]>
Date: 2016-06-17 (Fri, 17 Jun 2016)
Changed paths:
M inmates/lib/arm/gic.c
M inmates/lib/arm/include/gic.h
Log Message:
-----------
inmates: arm: lib: move IRQ stack initialization
On AArch64 we won't need to initialize an IRQ stack; just move
the functionality to a header, so we may reuse the gic library.
Signed-off-by: Antonios Motakis <[email protected]>
Commit: 63276c06c41f86e225de47a91eea38a165dfda3f
https://github.com/siemens/jailhouse/commit/63276c06c41f86e225de47a91eea38a165dfda3f
Author: Antonios Motakis <[email protected]>
Date: 2016-06-17 (Fri, 17 Jun 2016)
Changed paths:
M hypervisor/arch/arm/include/asm/sysregs.h
M inmates/lib/arm/timer.c
Log Message:
-----------
inmates, arm: prep timer library for AArch64
This patch is a minor touch up, that will allow to build the
ARM timer inmate library also on AArch64. We just need to add
the EL0 prefix to the CNTFRQ and CNTPCT sysregs, so we can
access them with the same code.
Signed-off-by: Antonios Motakis <[email protected]>
Commit: 24ffc4db72198a4ef0f069e0779c16a9215eecef
https://github.com/siemens/jailhouse/commit/24ffc4db72198a4ef0f069e0779c16a9215eecef
Author: Antonios Motakis <[email protected]>
Date: 2016-06-17 (Fri, 17 Jun 2016)
Changed paths:
M inmates/Makefile
M inmates/demos/arm64/Makefile
M inmates/lib/arm64/Makefile
A inmates/lib/arm64/Makefile.lib
A inmates/lib/arm64/header.S
A inmates/lib/arm64/include/gic.h
A inmates/lib/arm64/include/inmate.h
A inmates/lib/arm64/include/mach-amd-seattle/mach/gic_v2.h
A inmates/lib/arm64/include/mach-amd-seattle/mach/timer.h
A inmates/lib/arm64/include/mach-amd-seattle/mach/uart.h
A inmates/lib/arm64/include/mach-foundation-v8/mach/gic_v2.h
A inmates/lib/arm64/include/mach-foundation-v8/mach/timer.h
A inmates/lib/arm64/include/mach-foundation-v8/mach/uart.h
A inmates/lib/arm64/inmate.lds
Log Message:
-----------
inmates: arm64: port imate demos from AArch32 to AArch64
This is a straightforward port of the inmate demos from
AArch32 to AArch64. These can now be loaded as cells onto
a Foundation ARMv8 model.
Signed-off-by: Antonios Motakis <[email protected]>
Commit: 7b3a433bf5a648694713add0ed650d90ef3af315
https://github.com/siemens/jailhouse/commit/7b3a433bf5a648694713add0ed650d90ef3af315
Author: Antonios Motakis <[email protected]>
Date: 2016-06-17 (Fri, 17 Jun 2016)
Changed paths:
M hypervisor/arch/arm/irqchip.c
Log Message:
-----------
arm64: add work around for large SPIs on AMD Seattle
The AMD Seattle board features SPI ids that are larger than 64,
which we do not support properly. This workaround allows us to
demonstrate working cells on this target, until we have a proper fix.
This implies that only specific setups will be used on the
AMD Seattle; the IRQs for the uart and the second xgmac are being
passed to the cells.
Signed-off-by: Antonios Motakis <[email protected]>
Commit: 10e3d290ef9df916800513079c84d18315944e7a
https://github.com/siemens/jailhouse/commit/10e3d290ef9df916800513079c84d18315944e7a
Author: Antonios Motakis <[email protected]>
Date: 2016-06-17 (Fri, 17 Jun 2016)
Changed paths:
A configs/foundation-v8-uart-demo.c
Log Message:
-----------
config: add uart demo cell config for Foundation v8
Add a cell configuration file for the foundation-v8 model, to
be used with the PL011 UART inmate demo.
Signed-off-by: Antonios Motakis <[email protected]>
Commit: a055721c9929ac271444a1b49c1ffeced4a56dd9
https://github.com/siemens/jailhouse/commit/a055721c9929ac271444a1b49c1ffeced4a56dd9
Author: Antonios Motakis <[email protected]>
Date: 2016-06-17 (Fri, 17 Jun 2016)
Changed paths:
A configs/foundation-v8-gic-demo.c
Log Message:
-----------
config: gic inmate cell config for foundation-v8
Add a cell configuration file for the gic inmate demo, for the
foundation-v8 model.
Signed-off-by: Antonios Motakis <[email protected]>
Commit: c9f1528c3cc233abcb4209378b5652ea85cc9c59
https://github.com/siemens/jailhouse/commit/c9f1528c3cc233abcb4209378b5652ea85cc9c59
Author: Antonios Motakis <[email protected]>
Date: 2016-06-17 (Fri, 17 Jun 2016)
Changed paths:
A configs/amd-seattle-uart-demo.c
Log Message:
-----------
config: UART demo cell config for the AMD Seattle
Add a cell configuration file for the AMD Seattle development
board, to be used with the PL011 UART demo inmate.
Signed-off-by: Antonios Motakis <[email protected]>
Commit: b0139d38552a70890937a869fa65318abfeb206e
https://github.com/siemens/jailhouse/commit/b0139d38552a70890937a869fa65318abfeb206e
Author: Antonios Motakis <[email protected]>
Date: 2016-06-17 (Fri, 17 Jun 2016)
Changed paths:
A configs/amd-seattle-gic-demo.c
Log Message:
-----------
config: gic demo cell config for the AMD Seattle
Add a cell configuration file to use on the AMD Seattle, to be
used with the gic demo inmate.
Signed-off-by: Antonios Motakis <[email protected]>
Commit: d918e5defd7e87382dc6633f67dd1db371ce1309
https://github.com/siemens/jailhouse/commit/d918e5defd7e87382dc6633f67dd1db371ce1309
Author: Dmitry Voytik <[email protected]>
Date: 2016-06-17 (Fri, 17 Jun 2016)
Changed paths:
M inmates/tools/arm64/Makefile
A inmates/tools/arm64/linux-loader.c
Log Message:
-----------
inmates: arm64: implement non-root linux loader
This patch implements a loader, that can be used to boot a Linux
kernel in a Jailhouse cell on AArch64.
Signed-off-by: Dmitry Voytik <[email protected]>
Signed-off-by: Antonios Motakis <[email protected]>
[[email protected]:
- split foundation-v8 configuration to a separate patch
- small fixes in the linux loader output
- take kernel and dtb address using cell load command line ]
Commit: 7a6430691baac8e722cb55fcf3a49cb3d5fc64c1
https://github.com/siemens/jailhouse/commit/7a6430691baac8e722cb55fcf3a49cb3d5fc64c1
Author: Dmitry Voytik <[email protected]>
Date: 2016-06-17 (Fri, 17 Jun 2016)
Changed paths:
A configs/foundation-v8-linux-demo.c
A samples/kernel-inmate-foundation-v8.dts
Log Message:
-----------
config: add linux inmate cell config for foundation-v8
Add the cell configuration files, and some helper scripts and device
tree for the foundation-v8 model. These can be used to load a linux
inmate on a cell on that target.
Signed-off-by: Dmitry Voytik <[email protected]>
Signed-off-by: Antonios Motakis <[email protected]>
[[email protected]: split off as a separate patch,
some minor renaming for consistency]
Commit: ae3684730318822e390a95a3371760646196a3a1
https://github.com/siemens/jailhouse/commit/ae3684730318822e390a95a3371760646196a3a1
Author: Antonios Motakis <[email protected]>
Date: 2016-06-17 (Fri, 17 Jun 2016)
Changed paths:
A configs/amd-seattle-linux-demo.c
A samples/kernel-inmate-amd-seattle.dts
Log Message:
-----------
config: add linux inmate cell config for AMD Seattle
Add the cell configuration files, and some helper scripts and device
tree for the AMD Seattle development board. These can be used to
load a linux inmate on a cell on that target.
Signed-off-by: Antonios Motakis <[email protected]>
Commit: 0da180cccbee23f6b7490197f7454be9912861fd
https://github.com/siemens/jailhouse/commit/0da180cccbee23f6b7490197f7454be9912861fd
Author: Antonios Motakis <[email protected]>
Date: 2016-06-17 (Fri, 17 Jun 2016)
Changed paths:
A Documentation/non-root-linux-arm64.txt
Log Message:
-----------
Documentation: add instructions for ARM64 Linux loader
Add a short document describing the use of the Linux loader,
used to run Linux inmates on non-root cells on ARM64.
Signed-off-by: Antonios Motakis <[email protected]>
Compare:
https://github.com/siemens/jailhouse/compare/65ee2af7a8fb...0da180cccbee
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