On 2016-09-29 03:17, Jeff Smith wrote:
> I have been **attempting** to run a 32 bit “bare-metal” app in a cell
> (based on apic-demo.c) after adding the code as outlined below. The
> issue I am having is that when I attempt to use the APIC timer I keep
> getting the following:
>
>
>
> Initializing Jailhouse hypervisor v0.5 (422-g549be64-dirty) on CPU 1
>
> Code location: 0xfffffffff0000030
>
> Using xAPIC
>
> Page pool usage after early setup: mem 74/16339, remap 65/131072
>
> Initializing processors:
>
> CPU 1... (APIC ID 1) OK
>
> CPU 0... (APIC ID 0) OK
>
> CPU 2... (APIC ID 2) OK
>
> CPU 3... (APIC ID 3) OK
>
> Adding PCI device 00:00.0 to cell "core0-linux"
>
> Adding PCI device 00:01.0 to cell "core0-linux"
>
> Adding PCI device 00:01.1 to cell "core0-linux"
>
> Adding PCI device 00:02.0 to cell "core0-linux"
>
> Adding PCI device 00:02.3 to cell "core0-linux"
>
> Adding PCI device 00:02.4 to cell "core0-linux"
>
> Adding PCI device 00:10.0 to cell "core0-linux"
>
> Adding PCI device 00:11.0 to cell "core0-linux"
>
> Adding PCI device 00:12.0 to cell "core0-linux"
>
> Adding PCI device 00:12.2 to cell "core0-linux"
>
> Adding PCI device 00:13.0 to cell "core0-linux"
>
> Adding PCI device 00:13.2 to cell "core0-linux"
>
> Adding PCI device 00:14.0 to cell "core0-linux"
>
> Adding PCI device 00:14.2 to cell "core0-linux"
>
> Adding PCI device 00:14.3 to cell "core0-linux"
>
> Adding PCI device 00:18.0 to cell "core0-linux"
>
> Adding PCI device 00:18.1 to cell "core0-linux"
>
> Adding PCI device 00:18.2 to cell "core0-linux"
>
> Adding PCI device 00:18.3 to cell "core0-linux"
>
> Adding PCI device 00:18.4 to cell "core0-linux"
>
> Adding PCI device 00:18.5 to cell "core0-linux"
>
> Adding PCI device 01:00.0 to cell "core0-linux"
>
> Adding PCI device 01:00.1 to cell "core0-linux"
>
> Adding PCI device 01:00.2 to cell "core0-linux"
>
> Adding PCI device 01:00.3 to cell "core0-linux"
>
> Adding PCI device 02:00.0 to cell "core0-linux"
>
> Page pool usage after late setup: mem 220/16339, remap 65602/131072
>
> Activating hypervisor
>
> Created cell "core2-test"
>
> Page pool usage after cell creation: mem 237/16339, remap 65602/131072
>
> Cell "core2-test" can be loaded
>
> CPU 3 received SIPI, vector 100
>
> Started cell "core2-test"
>
> This runs in 32-bit mode (EFER: 1000)
>
> Calibrated TSC frequency: 12.307 kHz
>
> Setting handler for IRQ Vector 32
>
> Calibrated APIC frequency: 2572856 kHz
>
> Enabling Interrupts
>
> Interrupts Enabled
>
> Entering Service Loop..
>
> Calling handler for IRQ Vector 0
>
> FATAL: Unexpected #VMEXIT, exitcode 7f, exitinfo1 0x0000000000000000
> exitinfo2 0x0000000000000000
Likely "Triple Fault", i.e. your guest crashed spectacularly.
>
> RIP: 0x0000000000000000 RSP: 0x00000000000dffac FLAGS: 2
>
> RAX: 0x0000000000000000 RBX: 0x0000000000000133 RCX: 0x0000000000000000
>
> RDX: 0x00000000000dfec6 RSI: 0x0000000000000000 RDI: 0x0000000000000020
>
> CS: 8 BASE: 0x0000000000000000 AR-BYTES: c9b EFER.LMA 0
>
> CR0: 0x0000000080010011 CR3: 0x00000000000f3000 CR4: 0x0000000000000010
>
> EFER: 0x0000000000001000
>
> Parking CPU 3 (Cell: "core2-test")
>
> Cell "core2-test" can be loaded
>
> CPU 3 received SIPI, vector 100
>
>
>
> Code Added:
>
Showing this in patch form would have made it reproducible and easier
readable.
>
>
> Int.c
>
>
>
> "irq_common:\n\t"
>
> "push %rax\n\t"
>
> "push %rcx\n\t"
>
> "push %rdx\n\t"
>
> "push %rsi\n\t"
>
> "push %r8\n\t"
>
> "push %r9\n\t"
>
> "push %r10\n\t"
>
> "push %r11\n\t"
>
>
>
> "call handle_interrupt\n\t"
>
>
>
> "pop %r11\n\t"
>
> "pop %r10\n\t"
>
> "pop %r9\n\t"
>
> "pop %r8\n\t"
>
> "pop %rsi\n\t"
>
> "pop %rdx\n\t"
>
> "pop %rcx\n\t"
>
> "pop %rax\n\t"
>
> "pop %rdi\n\t"
>
>
>
> "iretq"
>
> );
>
> #else
>
> //#error implement me!
>
> asm(
>
> ".macro irq_prologue vector\n\t"
>
> "push %edi\n\t"
>
> "mov $vector,%edi\n\t"
>
On i386, you pass the first argument in eax.
> "jmp irq_common\n"
>
> ".endm\n\t"
>
>
>
> ".global irq_entry\n\t"
>
> ".balign 16\n"
>
> "irq_entry:\n"
>
> "vector=0\n"
>
> ".rept 64\n"
>
> "irq_prologue vector\n\t"
>
> "vector=vector+1\n\t"
>
> ".balign 16\n\t"
>
> ".endr\n"
>
>
>
> "irq_common:\n\t"
>
> "push %eax\n\t"
>
> "push %ecx\n\t"
>
> "push %edx\n\t"
>
> "push %esi\n\t"
>
You do not save ebx and - that should kill your inmate - ebp.
>
>
> "call handle_interrupt\n\t"
>
>
>
> "pop %esi\n\t"
>
> "pop %edx\n\t"
>
> "pop %ecx\n\t"
>
> "pop %eax\n\t"
>
> "pop %edi\n\t"
>
>
>
> "iret"
>
> );
>
> #endif
>
>
>
> Mem.c
>
> void map_range(void *start, unsigned long size, enum map_type map_type)
>
> {
>
> unsigned long pt_addr, *pt_entry, *pt;
>
> unsigned long vaddr = (unsigned long)start;
>
>
>
> asm volatile("mov %%cr3,%0" : "=r" (pt_addr));
>
>
>
> size += (vaddr & ~HUGE_PAGE_MASK) + HUGE_PAGE_SIZE - 1;
>
> size &= HUGE_PAGE_MASK;
>
> while (size > 0) {
>
> #ifdef __x86_64__
>
> pt_addr &= PAGE_MASK;
>
> pt = (unsigned long *)pt_addr;
>
>
>
> pt_entry = &pt[(vaddr >> 39) & 0x1ff];
>
> if (*pt_entry & PG_PRESENT) {
>
> pt = (unsigned long
> *)(*pt_entry & PAGE_MASK);
>
> } else {
>
> pt = alloc(PAGE_SIZE,
> PAGE_SIZE);
>
> *pt_entry = (unsigned
> long)pt | PG_RW | PG_PRESENT;
>
> }
>
>
>
> pt_entry = &pt[(vaddr >> 30) & 0x1ff];
>
> if (*pt_entry & PG_PRESENT) {
>
> pt = (unsigned long
> *)(*pt_entry & PAGE_MASK);
>
> } else {
>
> pt = alloc(PAGE_SIZE,
> PAGE_SIZE);
>
> *pt_entry = (unsigned
> long)pt | PG_RW | PG_PRESENT;
>
> }
>
>
>
> pt_entry = &pt[(vaddr >> 21) & 0x1ff];
>
> *pt_entry = (vaddr & HUGE_PAGE_MASK) |
>
> (map_type ==
> MAP_UNCACHED ? PG_PCD : 0) |
>
> PG_PS | PG_RW | PG_PRESENT;
>
> #else
>
>
>
> pt_addr &= PAGE_MASK;
>
> pt = (unsigned long *)pt_addr;
>
>
>
> pt_entry = &pt[(vaddr >> 22) & 0x3ff];
>
> if (*pt_entry & PG_PRESENT) {
>
> pt = (unsigned long
> *)(*pt_entry & (unsigned long)PAGE_MASK);
>
> } else {
>
> pt = alloc(PAGE_SIZE,
> PAGE_SIZE);
>
> *pt_entry = (unsigned
> long)pt | PG_RW | PG_PRESENT;
>
> }
>
> pt_entry = &pt[(vaddr >> 12) & 0x3ff];
>
> *pt_entry = (vaddr & HUGE_PAGE_MASK) |
>
> (map_type ==
> MAP_UNCACHED ? PG_PCD : 0) |
>
> PG_PS | PG_RW | PG_PRESENT;
>
Did you check this carefully against the page table structure in 32-bit
mode? It may be a source of problems as well, but I suppose you aren't
using it yet, are you?
Jan
--
Siemens AG, Corporate Technology, CT RDA ITP SES-DE
Corporate Competence Center Embedded Linux
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