From: Antonios Motakis <antonios.mota...@huawei.com>

This patch is a minor touch up, that will allow to build the
ARM timer inmate library also on AArch64. We just need to add
the EL0 prefix to the CNTFRQ and CNTPCT sysregs, so we can
access them with the same code.

Signed-off-by: Antonios Motakis <antonios.mota...@huawei.com>
Signed-off-by: Jan Kiszka <jan.kis...@siemens.com>
---
 hypervisor/arch/arm/include/asm/sysregs.h | 4 ++--
 inmates/lib/arm/timer.c                   | 6 +++---
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/hypervisor/arch/arm/include/asm/sysregs.h 
b/hypervisor/arch/arm/include/asm/sysregs.h
index 7b66545..9562936 100644
--- a/hypervisor/arch/arm/include/asm/sysregs.h
+++ b/hypervisor/arch/arm/include/asm/sysregs.h
@@ -62,7 +62,7 @@
 #define CNTV_CTL_EL0   SYSREG_32(0, c14, c3, 1)
 #define CNTV_CVAL_EL0  SYSREG_64(3, c14)
 
-#define CNTPCT         SYSREG_64(0, c14)
+#define CNTPCT_EL0     SYSREG_64(0, c14)
 
 /*
  * AArch32-specific registers: they are 64bit on AArch64, and will need some
@@ -98,7 +98,7 @@
 #define TPIDRURO       SYSREG_32(0, c13, c0, 3)
 #define TPIDRPRW       SYSREG_32(0, c13, c0, 4)
 
-#define CNTFRQ         SYSREG_32(0, c14, c0, 0)
+#define CNTFRQ_EL0     SYSREG_32(0, c14, c0, 0)
 
 #define ATS1HR         SYSREG_32(4, c7, c8, 0)
 
diff --git a/inmates/lib/arm/timer.c b/inmates/lib/arm/timer.c
index fcb4161..4681a69 100644
--- a/inmates/lib/arm/timer.c
+++ b/inmates/lib/arm/timer.c
@@ -17,9 +17,9 @@
 
 unsigned long timer_get_frequency(void)
 {
-       u32 freq;
+       unsigned long freq;
 
-       arm_read_sysreg(CNTFRQ, freq);
+       arm_read_sysreg(CNTFRQ_EL0, freq);
        return freq;
 }
 
@@ -27,7 +27,7 @@ u64 timer_get_ticks(void)
 {
        u64 pct64;
 
-       arm_read_sysreg(CNTPCT, pct64);
+       arm_read_sysreg(CNTPCT_EL0, pct64);
        return pct64;
 }
 
-- 
2.1.4

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