This was not respected on ARM before. Nevertheless, assume 32 bit MMIO access width as default.
Signed-off-by: Ralf Ramsauer <[email protected]> --- hypervisor/arch/arm-common/dbg-write.c | 24 ++++++++++++++++++++++-- hypervisor/arch/arm-common/include/asm/uart.h | 3 +++ hypervisor/arch/arm-common/uart-8250.c | 24 +++++++++++++----------- hypervisor/arch/arm-common/uart-pl011.c | 17 ++++++++--------- 4 files changed, 46 insertions(+), 22 deletions(-) diff --git a/hypervisor/arch/arm-common/dbg-write.c b/hypervisor/arch/arm-common/dbg-write.c index eae367e2b0af..7d61950b8cca 100644 --- a/hypervisor/arch/arm-common/dbg-write.c +++ b/hypervisor/arch/arm-common/dbg-write.c @@ -22,6 +22,16 @@ extern struct uart_chip uart_8250_ops, uart_pl011_ops; static struct uart_chip *uart = NULL; +static void mmio8_out(void *address, u32 value) +{ + mmio_write8(address, (u8)value); +} + +static u32 mmio8_in(void *address) +{ + return mmio_read8(address); +} + static void arm_uart_write(const char *msg) { char c = 0; @@ -43,10 +53,11 @@ static void arm_uart_write(const char *msg) void arch_dbg_write_init(void) { - unsigned char dbg_type = DBG_TYPE(system_config->debug_console.flags); + unsigned int flags = system_config->debug_console.flags; + unsigned char dbg_type = DBG_TYPE(flags); /* ARM only support MMIO based UARTs */ - if (!DBG_IS_MMIO(system_config->debug_console.flags)) + if (!DBG_IS_MMIO(flags)) return; if (dbg_type == JAILHOUSE_DBG_TYPE_PL011) @@ -55,6 +66,15 @@ void arch_dbg_write_init(void) uart = &uart_8250_ops; if (uart) { + /* Assume 32-bit MMIO width by default */ + uart->reg_out = mmio_write32; + uart->reg_in = mmio_read32; + + if (flags & JAILHOUSE_DBG_FLAG_REG_WIDTH_8) { + uart->reg_out = mmio8_out; + uart->reg_in = mmio8_in; + } + uart->debug_console = &system_config->debug_console; uart->virt_clock_reg = hypervisor_header.debug_clock_reg; uart->virt_base = hypervisor_header.debug_console_base; diff --git a/hypervisor/arch/arm-common/include/asm/uart.h b/hypervisor/arch/arm-common/include/asm/uart.h index b781a8a5c262..68fe17e8c02e 100644 --- a/hypervisor/arch/arm-common/include/asm/uart.h +++ b/hypervisor/arch/arm-common/include/asm/uart.h @@ -24,6 +24,9 @@ struct uart_chip { void (*init)(struct uart_chip*); void (*wait)(struct uart_chip *); void (*write)(struct uart_chip *, char c); + + void (*reg_out)(void*, u32); + u32 (*reg_in)(void*); }; void uart_chip_init(struct uart_chip *chip); diff --git a/hypervisor/arch/arm-common/uart-8250.c b/hypervisor/arch/arm-common/uart-8250.c index d1afb545e731..b510bde9c614 100644 --- a/hypervisor/arch/arm-common/uart-8250.c +++ b/hypervisor/arch/arm-common/uart-8250.c @@ -12,9 +12,10 @@ * the COPYING file in the top-level directory. */ -#include <jailhouse/mmio.h> -#include <jailhouse/processor.h> +#include <asm/types.h> #include <asm/uart.h> +#include <jailhouse/processor.h> +#include <jailhouse/cell-config.h> #define UART_TX 0x0 #define UART_DLL 0x0 @@ -29,30 +30,31 @@ static void uart_init(struct uart_chip *chip) { void *clock_reg = (void*)(unsigned long)chip->virt_clock_reg; unsigned int gate_nr = chip->debug_console->gate_nr; + unsigned int divider = chip->debug_console->divider; if (clock_reg) - mmio_write32(clock_reg, - mmio_read32(clock_reg) | (1 << gate_nr)); + chip->reg_out(clock_reg, + chip->reg_in(clock_reg) | (1 << gate_nr)); /* only initialise if divider is not zero */ - if (!chip->debug_console->divider) + if (!divider) return; - mmio_write32(chip->virt_base + UART_LCR, UART_LCR_DLAB); - mmio_write32(chip->virt_base + UART_DLL, chip->debug_console->divider); - mmio_write32(chip->virt_base + UART_DLM, 0); - mmio_write32(chip->virt_base + UART_LCR, UART_LCR_8N1); + chip->reg_out(chip->virt_base + UART_LCR, UART_LCR_DLAB); + chip->reg_out(chip->virt_base + UART_DLL, divider); + chip->reg_out(chip->virt_base + UART_DLM, 0); + chip->reg_out(chip->virt_base + UART_LCR, UART_LCR_8N1); } static void uart_wait(struct uart_chip *chip) { - while (!(mmio_read32(chip->virt_base + UART_LSR) & UART_LSR_THRE)) + while (!(chip->reg_in(chip->virt_base + UART_LSR) & UART_LSR_THRE)) cpu_relax(); } static void uart_write(struct uart_chip *chip, char c) { - mmio_write32(chip->virt_base + UART_TX, c); + chip->reg_out(chip->virt_base + UART_TX, c); } struct uart_chip uart_8250_ops = { diff --git a/hypervisor/arch/arm-common/uart-pl011.c b/hypervisor/arch/arm-common/uart-pl011.c index 113fc0bc58d3..b228fc9a03fb 100644 --- a/hypervisor/arch/arm-common/uart-pl011.c +++ b/hypervisor/arch/arm-common/uart-pl011.c @@ -10,7 +10,6 @@ * the COPYING file in the top-level directory. */ -#include <jailhouse/mmio.h> #include <asm/processor.h> #include <asm/uart.h> @@ -41,14 +40,14 @@ static void uart_init(struct uart_chip *chip) u32 bauddiv = UART_CLK / (16 * 115200); void *base = chip->virt_base; - mmio_write16(base + UARTCR, 0); - while (mmio_read8(base + UARTFR) & UARTFR_BUSY) + chip->reg_out(base + UARTCR, 0); + while (chip->reg_in(base + UARTFR) & UARTFR_BUSY) cpu_relax(); - mmio_write8(base + UARTLCR_H, UARTLCR_H_WLEN); - mmio_write16(base + UARTIBRD, bauddiv); - mmio_write16(base + UARTCR, (UARTCR_EN | UARTCR_TXE | UARTCR_RXE | - UARTCR_Out1 | UARTCR_Out2)); + chip->reg_out(base + UARTLCR_H, UARTLCR_H_WLEN); + chip->reg_out(base + UARTIBRD, bauddiv); + chip->reg_out(base + UARTCR, (UARTCR_EN | UARTCR_TXE | UARTCR_RXE | + UARTCR_Out1 | UARTCR_Out2)); #endif } @@ -57,14 +56,14 @@ static void uart_wait(struct uart_chip *chip) u32 flags; do { - flags = mmio_read32(chip->virt_base + UARTFR); + flags = chip->reg_in(chip->virt_base + UARTFR); cpu_relax(); } while (flags & (UARTFR_TXFF | UARTFR_BUSY)); /* FIFO full or busy */ } static void uart_write(struct uart_chip *chip, char c) { - mmio_write32(chip->virt_base + UARTDR, c); + chip->reg_out(chip->virt_base + UARTDR, c); } struct uart_chip uart_pl011_ops = { -- 2.10.2 -- You received this message because you are subscribed to the Google Groups "Jailhouse" group. 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