Branch: refs/heads/next
  Home:   https://github.com/siemens/jailhouse
  Commit: 060477fa318477dc6c4b3ea8b7f6e8796f84c7b9
      
https://github.com/siemens/jailhouse/commit/060477fa318477dc6c4b3ea8b7f6e8796f84c7b9
  Author: Jan Kiszka <[email protected]>
  Date:   2016-12-02 (Fri, 02 Dec 2016)

  Changed paths:
    M hypervisor/arch/arm-common/gic-v2.c
    M hypervisor/arch/arm-common/include/asm/irqchip.h
    M hypervisor/arch/arm-common/irqchip.c
    M hypervisor/arch/arm/gic-v3.c

  Log Message:
  -----------
  arm, arm64: Add irqchip_has_pending_irqs

This function returns true if the virtual irqchip of the a CPU has any
interrupt pending for cell injection. Will be needed to emulate the
PSCI service CPU_SUSPEND.

Signed-off-by: Jan Kiszka <[email protected]>


  Commit: fab73d5c1a88f22ef8e0a66e0a363e7d234e604b
      
https://github.com/siemens/jailhouse/commit/fab73d5c1a88f22ef8e0a66e0a363e7d234e604b
  Author: Jan Kiszka <[email protected]>
  Date:   2016-12-02 (Fri, 02 Dec 2016)

  Changed paths:
    M hypervisor/arch/arm-common/include/asm/psci.h
    M hypervisor/arch/arm-common/psci.c

  Log Message:
  -----------
  arm, arm64: Emulate PSCI service PSCI_CPU_SUSPEND

This is a mandatory service with PSCI v0.2+, and if the root cell was
using it prior to enabling Jailhouse, just returning an error, like we
do so far, will send the CPUs into a busy loop.

Implement the minimum of this service by sending the CPU into a wfi, but
only if there are no interrupt waiting to be injected. We better check
for physical interrupts after the wfi to reduce world switches and,
thus, event delivery latencies.

Signed-off-by: Jan Kiszka <[email protected]>


  Commit: 94dc9bf1a257d51cd632c0254334038c20c12d37
      
https://github.com/siemens/jailhouse/commit/94dc9bf1a257d51cd632c0254334038c20c12d37
  Author: Jan Kiszka <[email protected]>
  Date:   2016-12-02 (Fri, 02 Dec 2016)

  Changed paths:
    M hypervisor/arch/arm-common/gic-common.c
    M hypervisor/arch/arm-common/gic-v2.c
    M hypervisor/arch/arm-common/include/asm/gic.h
    M hypervisor/arch/arm-common/include/asm/irqchip.h
    M hypervisor/arch/arm-common/irqchip.c
    M hypervisor/arch/arm/gic-v3.c

  Log Message:
  -----------
  arm, arm64: Remove indirection to gic_handle_irq

Rename gic_handle_irq to irqchip_handle_irq so that this common
implementation is invoked directly.

On the long run, gic-common.c should be folded into irqchip.c because we
depend on GIC-based irqchips anyway.

Signed-off-by: Jan Kiszka <[email protected]>


  Commit: ccabeefd029711bb04c50390accd7eff30ba5a17
      
https://github.com/siemens/jailhouse/commit/ccabeefd029711bb04c50390accd7eff30ba5a17
  Author: Jan Kiszka <[email protected]>
  Date:   2016-12-02 (Fri, 02 Dec 2016)

  Changed paths:
    M hypervisor/arch/arm-common/gic-v2.c
    M hypervisor/arch/arm-common/irqchip.c
    M hypervisor/arch/arm/gic-v3.c

  Log Message:
  -----------
  arm, arm64: Move common GICD mapping into irqchip_cell_init

This logic is shared between GICv2 and GICv3.

Signed-off-by: Jan Kiszka <[email protected]>


  Commit: ac082ddd559b675adeec5315c58122f0159221b5
      
https://github.com/siemens/jailhouse/commit/ac082ddd559b675adeec5315c58122f0159221b5
  Author: Jan Kiszka <[email protected]>
  Date:   2016-12-02 (Fri, 02 Dec 2016)

  Changed paths:
    M hypervisor/arch/arm-common/include/asm/gic.h

  Log Message:
  -----------
  arm, arm64: Remove unneeded forward type declarations from gic.h

No longer needed, or we get them via the included headers.

Signed-off-by: Jan Kiszka <[email protected]>


  Commit: 71b3bd7726a83cc439c36d8dfcd47053654789b0
      
https://github.com/siemens/jailhouse/commit/71b3bd7726a83cc439c36d8dfcd47053654789b0
  Author: Jan Kiszka <[email protected]>
  Date:   2016-12-02 (Fri, 02 Dec 2016)

  Changed paths:
    M hypervisor/arch/arm-common/gic-common.c
    M hypervisor/arch/arm-common/gic-v2.c
    M hypervisor/arch/arm-common/include/asm/gic.h

  Log Message:
  -----------
  arm, arm64: Refactor target_cpu_map to gicv2_target_cpu_map

This mapping is GICv2-only, and therefore the variable is better
renamed. Also make sure that its size can be retrieved externally.

Signed-off-by: Jan Kiszka <[email protected]>


  Commit: 3e3b09628f48b5ceac661ff4434cecdbbf88100a
      
https://github.com/siemens/jailhouse/commit/3e3b09628f48b5ceac661ff4434cecdbbf88100a
  Author: Jan Kiszka <[email protected]>
  Date:   2016-12-02 (Fri, 02 Dec 2016)

  Changed paths:
    M hypervisor/arch/arm-common/include/asm/irqchip.h

  Log Message:
  -----------
  arm, arm64: Removed unused mmio_access irqchip callback

Leftover from dda4c03f.

Signed-off-by: Jan Kiszka <[email protected]>


  Commit: 138740691177b7f3a19798eb94203a591dc0af3c
      
https://github.com/siemens/jailhouse/commit/138740691177b7f3a19798eb94203a591dc0af3c
  Author: Jan Kiszka <[email protected]>
  Date:   2016-12-02 (Fri, 02 Dec 2016)

  Changed paths:
    M hypervisor/arch/arm-common/gic-common.c
    M hypervisor/arch/arm-common/gic-v2.c
    M hypervisor/arch/arm-common/include/asm/gic.h
    M hypervisor/arch/arm-common/include/asm/irqchip.h
    M hypervisor/arch/arm-common/irqchip.c
    M hypervisor/arch/arm/gic-v3.c

  Log Message:
  -----------
  arm, arm64: Factor out handle_irq_target irqchip callback

As we run the GICv3 only in affinity mode, access to ITARGETSR can be
ignored, and the existing handle_irq_target can become GICv2-only.

Signed-off-by: Jan Kiszka <[email protected]>


  Commit: 3d3b2b5fe2112b2546f898f6c81447bec618a2cd
      
https://github.com/siemens/jailhouse/commit/3d3b2b5fe2112b2546f898f6c81447bec618a2cd
  Author: Jan Kiszka <[email protected]>
  Date:   2016-12-02 (Fri, 02 Dec 2016)

  Changed paths:
    M hypervisor/arch/arm-common/gic-common.c
    M hypervisor/arch/arm-common/gic-v2.c
    M hypervisor/arch/arm-common/include/asm/gic.h

  Log Message:
  -----------
  arm, arm64: Fold gic_probe_cpu_id into GICv2 gic_cpu_init

This is the only user, and it is GICv2-only. As a side-effect, this now
actually evaluates the return value.

Signed-off-by: Jan Kiszka <[email protected]>


  Commit: 596bdbe7be03dabfaee0bb8203f8814a30aa290f
      
https://github.com/siemens/jailhouse/commit/596bdbe7be03dabfaee0bb8203f8814a30aa290f
  Author: Jan Kiszka <[email protected]>
  Date:   2016-12-02 (Fri, 02 Dec 2016)

  Changed paths:
    M hypervisor/arch/arm-common/gic-common.c
    M hypervisor/arch/arm-common/gic-v2.c
    M hypervisor/arch/arm-common/include/asm/gic.h

  Log Message:
  -----------
  arm, arm64: Move gic_targets_in_cell into gic-v2.c

This is GICv2-only.

Signed-off-by: Jan Kiszka <[email protected]>


  Commit: 837ff61a3676d45abbcc28845549dc5c653a5a7a
      
https://github.com/siemens/jailhouse/commit/837ff61a3676d45abbcc28845549dc5c653a5a7a
  Author: Jan Kiszka <[email protected]>
  Date:   2016-12-02 (Fri, 02 Dec 2016)

  Changed paths:
    M hypervisor/arch/arm-common/Kbuild
    R hypervisor/arch/arm-common/gic-common.c
    M hypervisor/arch/arm-common/include/asm/gic.h
    M hypervisor/arch/arm-common/irqchip.c

  Log Message:
  -----------
  arm, arm64: Fold gic-common.c into irqchip.c

Our irqchip is inherently GIC-centric, so there is no reason to split up
the frontend interface from the common GIC part. Move them together, and
also fold gic_set_irq_pending into its only caller.

Signed-off-by: Jan Kiszka <[email protected]>


  Commit: 9de4645d07f7f723baefc6551ec673bfc6be358d
      
https://github.com/siemens/jailhouse/commit/9de4645d07f7f723baefc6551ec673bfc6be358d
  Author: Claudio Scordino <[email protected]>
  Date:   2016-12-02 (Fri, 02 Dec 2016)

  Changed paths:
    M README.md

  Log Message:
  -----------
  README: more explicit requirements

This patch aims at reorganizing the README and making the (hardware and
software) requirements more explicit.

Signed-off-by: Claudio Scordino <[email protected]>
[Jan: updated min. ARM kernel version, removed new lines at EOF]
Signed-off-by: Jan Kiszka <[email protected]>


Compare: 
https://github.com/siemens/jailhouse/compare/3e412fd022af...9de4645d07f7

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