Branch: refs/heads/next
Home: https://github.com/siemens/jailhouse
Commit: 67b7271cf7ae1c31c825ff42848be76a78bd1bdb
https://github.com/siemens/jailhouse/commit/67b7271cf7ae1c31c825ff42848be76a78bd1bdb
Author: Jan Kiszka <[email protected]>
Date: 2016-12-02 (Fri, 02 Dec 2016)
Changed paths:
M hypervisor/arch/arm-common/gic-v2.c
M hypervisor/arch/arm-common/include/asm/irqchip.h
M hypervisor/arch/arm-common/irqchip.c
M hypervisor/arch/arm/gic-v3.c
Log Message:
-----------
arm, arm64: Add irqchip_has_pending_irqs
This function returns true if the virtual irqchip of the a CPU has any
interrupt pending for cell injection. Will be needed to emulate the
PSCI service CPU_SUSPEND.
CC: Ralf Ramsauer <[email protected]>
CC: Mark Rutland <[email protected]>
Signed-off-by: Jan Kiszka <[email protected]>
Commit: fc8eaeb3fd30c63379b81d8a1c7d3c5afd7a3085
https://github.com/siemens/jailhouse/commit/fc8eaeb3fd30c63379b81d8a1c7d3c5afd7a3085
Author: Jan Kiszka <[email protected]>
Date: 2016-12-02 (Fri, 02 Dec 2016)
Changed paths:
M hypervisor/arch/arm-common/include/asm/psci.h
M hypervisor/arch/arm-common/psci.c
Log Message:
-----------
arm, arm64: Emulate PSCI service PSCI_CPU_SUSPEND
This is a mandatory service with PSCI v0.2+, and if the root cell was
using it prior to enabling Jailhouse, just returning an error, like we
do so far, will send the CPUs into a busy loop.
Implement the minimum of this service by sending the CPU into a wfi, but
only if there are no interrupt waiting to be injected. We better check
for physical interrupts after the wfi to reduce world switches and,
thus, event delivery latencies.
CC: Ralf Ramsauer <[email protected]>
CC: Mark Rutland <[email protected]>
Signed-off-by: Jan Kiszka <[email protected]>
Commit: 50c3028a77d00f77c16b749ff5abb92bc3299121
https://github.com/siemens/jailhouse/commit/50c3028a77d00f77c16b749ff5abb92bc3299121
Author: Jan Kiszka <[email protected]>
Date: 2016-12-02 (Fri, 02 Dec 2016)
Changed paths:
M hypervisor/arch/arm-common/gic-common.c
M hypervisor/arch/arm-common/gic-v2.c
M hypervisor/arch/arm-common/include/asm/gic.h
M hypervisor/arch/arm-common/include/asm/irqchip.h
M hypervisor/arch/arm-common/irqchip.c
M hypervisor/arch/arm/gic-v3.c
Log Message:
-----------
arm, arm64: Remove indirection to gic_handle_irq
Rename gic_handle_irq to irqchip_handle_irq so that this common
implementation is invoked directly.
On the long run, gic-common.c should be folded into irqchip.c because we
depend on GIC-based irqchips anyway.
Signed-off-by: Jan Kiszka <[email protected]>
Commit: 0ba4b29692c251c0e348e2f225957cdc1ec113e5
https://github.com/siemens/jailhouse/commit/0ba4b29692c251c0e348e2f225957cdc1ec113e5
Author: Jan Kiszka <[email protected]>
Date: 2016-12-02 (Fri, 02 Dec 2016)
Changed paths:
M hypervisor/arch/arm-common/gic-v2.c
M hypervisor/arch/arm-common/irqchip.c
M hypervisor/arch/arm/gic-v3.c
Log Message:
-----------
arm, arm64: Move common GICD mapping into irqchip_cell_init
This logic is shared between GICv2 and GICv3.
Signed-off-by: Jan Kiszka <[email protected]>
Commit: 4accad0c42b7ec84168ace8097fe372dfdc55cb8
https://github.com/siemens/jailhouse/commit/4accad0c42b7ec84168ace8097fe372dfdc55cb8
Author: Jan Kiszka <[email protected]>
Date: 2016-12-02 (Fri, 02 Dec 2016)
Changed paths:
M hypervisor/arch/arm-common/include/asm/gic.h
Log Message:
-----------
arm, arm64: Remove unneeded forward type declarations from gic.h
No longer needed, or we get them via the included headers.
Signed-off-by: Jan Kiszka <[email protected]>
Commit: 24f42ee4652f75bf580d4580571b7a83ada4b4b7
https://github.com/siemens/jailhouse/commit/24f42ee4652f75bf580d4580571b7a83ada4b4b7
Author: Jan Kiszka <[email protected]>
Date: 2016-12-02 (Fri, 02 Dec 2016)
Changed paths:
M hypervisor/arch/arm-common/gic-common.c
M hypervisor/arch/arm-common/gic-v2.c
M hypervisor/arch/arm-common/include/asm/gic.h
Log Message:
-----------
arm, arm64: Refactor target_cpu_map to gicv2_target_cpu_map
This mapping is GICv2-only, and therefore the variable is better
renamed. Also make sure that its size can be retrieved externally.
Signed-off-by: Jan Kiszka <[email protected]>
Commit: 30186d12d20d6440fa3b7d892107a81d0c4d5f79
https://github.com/siemens/jailhouse/commit/30186d12d20d6440fa3b7d892107a81d0c4d5f79
Author: Jan Kiszka <[email protected]>
Date: 2016-12-02 (Fri, 02 Dec 2016)
Changed paths:
M hypervisor/arch/arm-common/include/asm/irqchip.h
Log Message:
-----------
arm, arm64: Removed unused mmio_access irqchip callback
Leftover from dda4c03f.
Signed-off-by: Jan Kiszka <[email protected]>
Commit: b5c32c0363583872c9a19819160c3e42614b6b3e
https://github.com/siemens/jailhouse/commit/b5c32c0363583872c9a19819160c3e42614b6b3e
Author: Jan Kiszka <[email protected]>
Date: 2016-12-02 (Fri, 02 Dec 2016)
Changed paths:
M hypervisor/arch/arm-common/gic-common.c
M hypervisor/arch/arm-common/gic-v2.c
M hypervisor/arch/arm-common/include/asm/gic.h
M hypervisor/arch/arm-common/include/asm/irqchip.h
M hypervisor/arch/arm-common/irqchip.c
M hypervisor/arch/arm/gic-v3.c
Log Message:
-----------
arm, arm64: Factor out handle_irq_target irqchip callback
As we run the GICv3 only in affinity mode, access to ITARGETSR can be
ignored, and the existing handle_irq_target can become GICv2-only.
Signed-off-by: Jan Kiszka <[email protected]>
Commit: 76398e97ba2153536ba0cb0494ee91a6e5d1e521
https://github.com/siemens/jailhouse/commit/76398e97ba2153536ba0cb0494ee91a6e5d1e521
Author: Jan Kiszka <[email protected]>
Date: 2016-12-02 (Fri, 02 Dec 2016)
Changed paths:
M hypervisor/arch/arm-common/gic-common.c
M hypervisor/arch/arm-common/gic-v2.c
M hypervisor/arch/arm-common/include/asm/gic.h
Log Message:
-----------
arm, arm64: Fold gic_probe_cpu_id into GICv2 gic_cpu_init
This is the only user, and it is GICv2-only. As a side-effect, this now
actually evaluates the return value.
Signed-off-by: Jan Kiszka <[email protected]>
Commit: 4bc48b04719c6d504587b71115e0c12035ac11a5
https://github.com/siemens/jailhouse/commit/4bc48b04719c6d504587b71115e0c12035ac11a5
Author: Jan Kiszka <[email protected]>
Date: 2016-12-02 (Fri, 02 Dec 2016)
Changed paths:
M hypervisor/arch/arm-common/gic-common.c
M hypervisor/arch/arm-common/gic-v2.c
M hypervisor/arch/arm-common/include/asm/gic.h
Log Message:
-----------
arm, arm64: Move gic_targets_in_cell into gic-v2.c
This is GICv2-only.
Signed-off-by: Jan Kiszka <[email protected]>
Commit: 126dc3436673ddcdd5eddbb18f57b3bc717369d3
https://github.com/siemens/jailhouse/commit/126dc3436673ddcdd5eddbb18f57b3bc717369d3
Author: Jan Kiszka <[email protected]>
Date: 2016-12-02 (Fri, 02 Dec 2016)
Changed paths:
M hypervisor/arch/arm-common/Kbuild
R hypervisor/arch/arm-common/gic-common.c
M hypervisor/arch/arm-common/include/asm/gic.h
M hypervisor/arch/arm-common/irqchip.c
Log Message:
-----------
arm, arm64: Fold gic-common.c into irqchip.c
Our irqchip is inherently GIC-centric, so there is no reason to split up
the frontend interface from the common GIC part. Move them together, and
also fold gic_set_irq_pending into its only caller.
Signed-off-by: Jan Kiszka <[email protected]>
Commit: fc9387c884fe34d9f9370076d95ce5fda85f8c34
https://github.com/siemens/jailhouse/commit/fc9387c884fe34d9f9370076d95ce5fda85f8c34
Author: Claudio Scordino <[email protected]>
Date: 2016-12-02 (Fri, 02 Dec 2016)
Changed paths:
M README.md
Log Message:
-----------
README: more explicit requirements
This patch aims at reorganizing the README and making the (hardware and
software) requirements more explicit.
Signed-off-by: Claudio Scordino <[email protected]>
[Jan: updated min. ARM kernel version, removed new lines at EOF]
Signed-off-by: Jan Kiszka <[email protected]>
Compare:
https://github.com/siemens/jailhouse/compare/9de4645d07f7...fc9387c884fe
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