Rename gic_handle_irq to irqchip_handle_irq so that this common implementation is invoked directly.
On the long run, gic-common.c should be folded into irqchip.c because we depend on GIC-based irqchips anyway. Signed-off-by: Jan Kiszka <[email protected]> --- hypervisor/arch/arm-common/gic-common.c | 2 +- hypervisor/arch/arm-common/gic-v2.c | 1 - hypervisor/arch/arm-common/include/asm/gic.h | 1 - hypervisor/arch/arm-common/include/asm/irqchip.h | 1 - hypervisor/arch/arm-common/irqchip.c | 5 ----- hypervisor/arch/arm/gic-v3.c | 1 - 6 files changed, 1 insertion(+), 10 deletions(-) diff --git a/hypervisor/arch/arm-common/gic-common.c b/hypervisor/arch/arm-common/gic-common.c index e2a88c7..e0771d8 100644 --- a/hypervisor/arch/arm-common/gic-common.c +++ b/hypervisor/arch/arm-common/gic-common.c @@ -316,7 +316,7 @@ enum mmio_result gic_handle_dist_access(void *arg, struct mmio_access *mmio) return ret; } -void gic_handle_irq(struct per_cpu *cpu_data) +void irqchip_handle_irq(struct per_cpu *cpu_data) { unsigned int count_event = 1; bool handled = false; diff --git a/hypervisor/arch/arm-common/gic-v2.c b/hypervisor/arch/arm-common/gic-v2.c index 200ea5e..f18d9ac 100644 --- a/hypervisor/arch/arm-common/gic-v2.c +++ b/hypervisor/arch/arm-common/gic-v2.c @@ -313,7 +313,6 @@ struct irqchip_ops irqchip = { .adjust_irq_target = gic_adjust_irq_target, .send_sgi = gic_send_sgi, - .handle_irq = gic_handle_irq, .inject_irq = gic_inject_irq, .enable_maint_irq = gic_enable_maint_irq, .has_pending_irqs = gic_has_pending_irqs, diff --git a/hypervisor/arch/arm-common/include/asm/gic.h b/hypervisor/arch/arm-common/include/asm/gic.h index 8cc1fac..b8fab88 100644 --- a/hypervisor/arch/arm-common/include/asm/gic.h +++ b/hypervisor/arch/arm-common/include/asm/gic.h @@ -63,7 +63,6 @@ enum mmio_result gic_handle_dist_access(void *arg, struct mmio_access *mmio); enum mmio_result gic_handle_irq_route(struct mmio_access *mmio, unsigned int irq); void gic_handle_sgir_write(struct sgi *sgi, bool virt_input); -void gic_handle_irq(struct per_cpu *cpu_data); bool gic_targets_in_cell(struct cell *cell, u8 targets); void gic_set_irq_pending(u16 irq_id); diff --git a/hypervisor/arch/arm-common/include/asm/irqchip.h b/hypervisor/arch/arm-common/include/asm/irqchip.h index afb5eee..b531f52 100644 --- a/hypervisor/arch/arm-common/include/asm/irqchip.h +++ b/hypervisor/arch/arm-common/include/asm/irqchip.h @@ -48,7 +48,6 @@ struct irqchip_ops { void (*adjust_irq_target)(struct cell *cell, u16 irq_id); int (*send_sgi)(struct sgi *sgi); - void (*handle_irq)(struct per_cpu *cpu_data); void (*eoi_irq)(u32 irqn, bool deactivate); int (*inject_irq)(struct per_cpu *cpu_data, u16 irq_id); void (*enable_maint_irq)(bool enable); diff --git a/hypervisor/arch/arm-common/irqchip.c b/hypervisor/arch/arm-common/irqchip.c index 0b6f36c..a2cab3a 100644 --- a/hypervisor/arch/arm-common/irqchip.c +++ b/hypervisor/arch/arm-common/irqchip.c @@ -122,11 +122,6 @@ void irqchip_inject_pending(struct per_cpu *cpu_data) irqchip.enable_maint_irq(false); } -void irqchip_handle_irq(struct per_cpu *cpu_data) -{ - irqchip.handle_irq(cpu_data); -} - void irqchip_eoi_irq(u32 irqn, bool deactivate) { irqchip.eoi_irq(irqn, deactivate); diff --git a/hypervisor/arch/arm/gic-v3.c b/hypervisor/arch/arm/gic-v3.c index 2a42deb..bf16ac3 100644 --- a/hypervisor/arch/arm/gic-v3.c +++ b/hypervisor/arch/arm/gic-v3.c @@ -446,7 +446,6 @@ struct irqchip_ops irqchip = { .cell_init = gic_cell_init, .adjust_irq_target = gic_adjust_irq_target, .send_sgi = gic_send_sgi, - .handle_irq = gic_handle_irq, .inject_irq = gic_inject_irq, .enable_maint_irq = gicv3_enable_maint_irq, .has_pending_irqs = gicv3_has_pending_irqs, -- 2.1.4 -- You received this message because you are subscribed to the Google Groups "Jailhouse" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. For more options, visit https://groups.google.com/d/optout.
