I've attached output from the hypervisor with the changes to pci.c
________________________________ From: Jan Kiszka <[email protected]> Sent: Tuesday, January 17, 2017 12:01:37 PM To: Vaidyanath, Rajiv; [email protected] Subject: Re: Device assignment to non-root On 2017-01-17 16:40, Vaidyanath, Rajiv wrote: > > Attaching the output. > OK, before patching the invalid write to silence, I'd like to understand weather we are shadowed by disabled master. Could you re-run with this updated instrumentation? diff --git a/hypervisor/arch/x86/pci.c b/hypervisor/arch/x86/pci.c index 19d0ea9..9c629da 100644 --- a/hypervisor/arch/x86/pci.c +++ b/hypervisor/arch/x86/pci.c @@ -333,12 +340,23 @@ int arch_pci_update_msi(struct pci_device *device, u16 bdf = info->bdf; int result = 0; + if (device->cell != &root_cell) + printk("%s: %x: %d %08x %08x %08x %08x\n", __FUNCTION__, + device->info->bdf, vectors, + device->msi_registers.raw[0], + device->msi_registers.raw[1], + device->msi_registers.raw[2], + device->msi_registers.raw[3]); if (vectors == 0) return 0; for (n = 0; n < vectors; n++) { irq_msg = x86_pci_translate_msi(device, n, vectors, msi); result = iommu_map_interrupt(device->cell, bdf, n, irq_msg); + if (device->cell != &root_cell) + printk("%llx %d, master %d\n", *(u64 *)&irq_msg, result, + pci_read_config(info->bdf, PCI_CFG_COMMAND, 2) & + PCI_CMD_MASTER); // HACK for QEMU if (result == -ENOSYS) { for (n = 1; n < (info->msi_64bits ? 4 : 3); n++) Thanks, Jan -- Siemens AG, Corporate Technology, CT RDA ITP SES-DE Corporate Competence Center Embedded Linux -- You received this message because you are subscribed to the Google Groups "Jailhouse" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. For more options, visit https://groups.google.com/d/optout.
# ifconfig eth0 10.134.30.231 netmask 255.255.255.0 broadcast 10.134.30.255arch_pci_update_msi: 400: 0 00800000 00000000 00000000 00000000 arch_pci_update_msi: 400: 0 00800000 00000000 00000000 00000000 arch_pci_update_msi: 400: 0 00800000 fee04000 00000000 00000000 arch_pci_update_msi: 400: 0 00800000 fee04000 00000000 00000000 arch_pci_update_msi: 400: 0 00800000 fee04000 00000000 00004031 arch_pci_update_msi: 400: 1 00810000 fee04000 00000000 00004031 400004031 97, master 4 arch_pci_update_msi: 400: 1 00810000 fee04000 00000000 00004031 400004031 97, master 4 arch_pci_update_msi: 400: 1 00810000 fee04000 00000000 00004031 400004031 97, master 4 arch_pci_update_msi: 400: 1 00810000 fee04000 00000000 00004031 400004031 97, master 4 arch_pci_update_msi: 400: 1 00810000 fee04000 00000000 00004031 400004031 97, master 4 arch_pci_update_msi: 400: 1 00810000 fee04000 00000000 00004031 400004031 97, master 4 arch_pci_update_msi: 400: 1 00810000 fee04000 00000000 00004031 400004031 97, master 4 arch_pci_update_msi: 400: 1 00810000 fee04000 00000000 00004031 400004031 97, master 4 arch_pci_update_msi: 400: 1 00810000 fee04000 00000000 00004031 400004031 97, master 4 arch_pci_update_msi: 400: 1 00810000 fee04000 00000000 00004031 400004031 97, master 4 arch_pci_update_msi: 400: 1 00810000 00000000 00000000 00004031 4031 -1, master 4 FATAL: Invalid PCI config write, port: cfc, size 4, address port: 800400ec RIP: 0xffffffff81702358 RSP: 0xffffc900001f39f8 FLAGS: 46 RAX: 0x0000000000000000 RBX: 0x00000000000000ec RCX: 0x00000000000000ec RDX: 0x0000000000000cfc RSI: 0x0000000000000097 RDI: 0x00000000800400ec CS: 10 BASE: 0x0000000000000000 AR-BYTES: a09b EFER.LMA 1 CR0: 0x0000000080050033 CR3: 0x000000000b398000 CR4: 0x00000000001426f0 EFER: 0x0000000000000d01 Parking CPU 2 (Cell: "linux2")
