A tiny low-cost board, based on the Allwinner H2+ with 4 Cortex-A7 cores. Configs are designed for the 256M variant. Make sure to reserve the top 128M before running the non-root Linux inmate.
Signed-off-by: Jan Kiszka <[email protected]> --- configs/dts/inmate-orangepi0.dts | 108 ++++++++++++++++++++++++++++ configs/orangepi0-gic-demo.c | 63 +++++++++++++++++ configs/orangepi0-linux-demo.c | 100 ++++++++++++++++++++++++++ configs/orangepi0.c | 148 +++++++++++++++++++++++++++++++++++++++ inmates/lib/arm/include/mach.h | 9 +++ 5 files changed, 428 insertions(+) create mode 100644 configs/dts/inmate-orangepi0.dts create mode 100644 configs/orangepi0-gic-demo.c create mode 100644 configs/orangepi0-linux-demo.c create mode 100644 configs/orangepi0.c diff --git a/configs/dts/inmate-orangepi0.dts b/configs/dts/inmate-orangepi0.dts new file mode 100644 index 0000000..effbabe --- /dev/null +++ b/configs/dts/inmate-orangepi0.dts @@ -0,0 +1,108 @@ +/* + * Jailhouse, a Linux-based partitioning hypervisor + * + * Device tree for Linux inmate test on Orange Pi Zero board, + * corresponds to configs/orangepi0-linux-demo.c + * + * Copyright (c) Siemens AG, 2016-2017 + * + * Authors: + * Jan Kiszka <[email protected]> + * + * This work is licensed under the terms of the GNU GPL, version 2. See + * the COPYING file in the top-level directory. + */ + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/dts-v1/; + +/ { + model = "Jailhouse cell on Orange Pi Zero"; + + #address-cells = <1>; + #size-cells = <1>; + + interrupt-parent = <&gic>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + compatible = "arm,cortex-a7"; + device_type = "cpu"; + reg = <0>; + }; + + cpu@1 { + compatible = "arm,cortex-a7"; + device_type = "cpu"; + reg = <3>; + }; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + timer { + compatible = "arm,armv7-timer"; + interrupts = <GIC_PPI 13 + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 14 + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 11 + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 10 + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; + }; + + clocks { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + osc24M: clk24M { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <24000000>; + clock-output-names = "osc24M"; + }; + }; + + gic: interrupt-controller@01c81000 { + compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic"; + reg = <0x01c81000 0x1000>, + <0x01c82000 0x1000>; + interrupt-controller; + #interrupt-cells = <3>; + }; + + uart: serial@01c28000 { + compatible = "snps,dw-apb-uart"; + reg = <0x01c28000 0x400>; + interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>; + reg-shift = <2>; + reg-io-width = <4>; + clock-frequency = <24000000>; + }; + + vpci@2000000 { + compatible = "pci-host-ecam-generic"; + device_type = "pci"; + bus-range = <0 0>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &gic GIC_SPI 123 0>, + <0 0 0 2 &gic GIC_SPI 124 0>, + <0 0 0 3 &gic GIC_SPI 125 0>, + <0 0 0 4 &gic GIC_SPI 126 0>; + reg = <0x2000000 0x100000>; + ranges = + <0x02000000 0x00 0x10000000 0x10000000 0x00 0x10000>; + }; +}; diff --git a/configs/orangepi0-gic-demo.c b/configs/orangepi0-gic-demo.c new file mode 100644 index 0000000..3a1ab7b --- /dev/null +++ b/configs/orangepi0-gic-demo.c @@ -0,0 +1,63 @@ +/* + * Jailhouse, a Linux-based partitioning hypervisor + * + * Configuration for gic-demo inmate on Orange Pi Zero: + * 1 CPU, 64K RAM, serial ports 0-3, GPIO PA + * + * Copyright (c) Siemens AG, 2014-2016 + * + * Authors: + * Jan Kiszka <[email protected]> + * + * This work is licensed under the terms of the GNU GPL, version 2. See + * the COPYING file in the top-level directory. + */ + +#include <jailhouse/types.h> +#include <jailhouse/cell-config.h> + +#define ARRAY_SIZE(a) sizeof(a) / sizeof(a[0]) + +struct { + struct jailhouse_cell_desc cell; + __u64 cpus[1]; + struct jailhouse_memory mem_regions[3]; +} __attribute__((packed)) config = { + .cell = { + .signature = JAILHOUSE_CELL_DESC_SIGNATURE, + .revision = JAILHOUSE_CONFIG_REVISION, + .name = "orangepi0-gic-demo", + .flags = JAILHOUSE_CELL_PASSIVE_COMMREG, + + .cpu_set_size = sizeof(config.cpus), + .num_memory_regions = ARRAY_SIZE(config.mem_regions), + }, + + .cpus = { + 0x2, + }, + + .mem_regions = { + /* GPIO: port A */ { + .phys_start = 0x01c20800, + .virt_start = 0x01c20800, + .size = 0x24, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO | JAILHOUSE_MEM_IO_32, + }, + /* UART 0-3 */ { + .phys_start = 0x01c28000, + .virt_start = 0x01c28000, + .size = 0x1000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO | JAILHOUSE_MEM_ROOTSHARED, + }, + /* RAM */ { + .phys_start = 0x4f6f0000, + .virt_start = 0, + .size = 0x00010000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE, + }, + }, +}; diff --git a/configs/orangepi0-linux-demo.c b/configs/orangepi0-linux-demo.c new file mode 100644 index 0000000..18d9f21 --- /dev/null +++ b/configs/orangepi0-linux-demo.c @@ -0,0 +1,100 @@ +/* + * Jailhouse, a Linux-based partitioning hypervisor + * + * Configuration for linux-demo inmate on Orange Pi Zero: + * 1 CPU, 64M RAM, serial port 0 + * + * Copyright (c) Siemens AG, 2014-2017 + * + * Authors: + * Jan Kiszka <[email protected]> + * + * This work is licensed under the terms of the GNU GPL, version 2. See + * the COPYING file in the top-level directory. + */ + +#include <jailhouse/types.h> +#include <jailhouse/cell-config.h> + +#define ARRAY_SIZE(a) sizeof(a) / sizeof(a[0]) + +struct { + struct jailhouse_cell_desc cell; + __u64 cpus[1]; + struct jailhouse_memory mem_regions[4]; + struct jailhouse_irqchip irqchips[1]; + struct jailhouse_pci_device pci_devices[1]; +} __attribute__((packed)) config = { + .cell = { + .signature = JAILHOUSE_CELL_DESC_SIGNATURE, + .revision = JAILHOUSE_CONFIG_REVISION, + .name = "orangepi0-linux-demo", + .flags = JAILHOUSE_CELL_PASSIVE_COMMREG|JAILHOUSE_CELL_DEBUG_CONSOLE, + + .cpu_set_size = sizeof(config.cpus), + .num_memory_regions = ARRAY_SIZE(config.mem_regions), + .num_irqchips = ARRAY_SIZE(config.irqchips), + .num_pci_devices = ARRAY_SIZE(config.pci_devices), + + .vpci_irq_base = 123, + }, + + .cpus = { + 0xc, + }, + + .mem_regions = { + /* UART 0-3 */ { + .phys_start = 0x01c28000, + .virt_start = 0x01c28000, + .size = 0x1000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO | JAILHOUSE_MEM_ROOTSHARED, + }, + /* RAM */ { + .phys_start = 0x4f6f0000, + .virt_start = 0, + .size = 0x10000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE, + }, + /* RAM */ { + .phys_start = 0x48000000, + .virt_start = 0x48000000, + .size = 0x76f0000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA | + JAILHOUSE_MEM_LOADABLE, + }, + /* IVSHMEM shared memory region */ { + .phys_start = 0x4f700000, + .virt_start = 0x4f700000, + .size = 0x100000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_ROOTSHARED, + }, + }, + + .irqchips = { + /* GIC */ { + .address = 0x01c81000, + .pin_base = 32, + .pin_bitmap = { + 1 << (32-32), 0, 0, 1 << (155-128), + }, + }, + }, + + .pci_devices = { + { + .type = JAILHOUSE_PCI_TYPE_IVSHMEM, + .bdf = 0x00, + .bar_mask = { + 0xffffff00, 0xffffffff, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, + }, + .shmem_region = 3, + .shmem_protocol = JAILHOUSE_SHMEM_PROTO_VETH, + }, + }, +}; diff --git a/configs/orangepi0.c b/configs/orangepi0.c new file mode 100644 index 0000000..a37e5d4 --- /dev/null +++ b/configs/orangepi0.c @@ -0,0 +1,148 @@ +/* + * Jailhouse, a Linux-based partitioning hypervisor + * + * Test configuration for Orange Pi Zero (H2+ quad-core Cortex-A7, 256MB RAM) + * + * Copyright (c) Siemens AG, 2014-2016 + * + * Authors: + * Jan Kiszka <[email protected]> + * + * This work is licensed under the terms of the GNU GPL, version 2. See + * the COPYING file in the top-level directory. + */ + +#include <jailhouse/types.h> +#include <jailhouse/cell-config.h> + +#define ARRAY_SIZE(a) sizeof(a) / sizeof(a[0]) + +struct { + struct jailhouse_system header; + __u64 cpus[1]; + struct jailhouse_memory mem_regions[8]; + struct jailhouse_irqchip irqchips[1]; + struct jailhouse_pci_device pci_devices[1]; +} __attribute__((packed)) config = { + .header = { + .signature = JAILHOUSE_SYSTEM_SIGNATURE, + .revision = JAILHOUSE_CONFIG_REVISION, + .hypervisor_memory = { + .phys_start = 0x4f800000, + .size = 0x800000, + }, + .debug_console = { + .address = 0x01c28000, + .size = 0x1000, + .flags = JAILHOUSE_CON_TYPE_8250 | + JAILHOUSE_CON_FLAG_MMIO, + }, + .platform_info = { + .pci_mmconfig_base = 0x2000000, + .pci_mmconfig_end_bus = 0, + .pci_is_virtual = 1, + .arm = { + .gicd_base = 0x01c81000, + .gicc_base = 0x01c82000, + .gich_base = 0x01c84000, + .gicv_base = 0x01c86000, + .maintenance_irq = 25, + }, + }, + .root_cell = { + .name = "Orange-Pi0", + + .cpu_set_size = sizeof(config.cpus), + .num_memory_regions = ARRAY_SIZE(config.mem_regions), + .num_irqchips = ARRAY_SIZE(config.irqchips), + .num_pci_devices = ARRAY_SIZE(config.pci_devices), + + .vpci_irq_base = 108, + }, + }, + + .cpus = { + 0xf, + }, + + .mem_regions = { + /* MMIO 1 (permissive) */ { + .phys_start = 0x01c00000, + .virt_start = 0x01c00000, + .size = 0x20000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* pinctrl PA */ { + .phys_start = 0x01c20800, + .virt_start = 0x01c20800, + .size = 0x24, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO | JAILHOUSE_MEM_IO_32, + }, + /* pinctrl rest */ { + .phys_start = 0x01c20824, + .virt_start = 0x01c20824, + .size = 0x3dc, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO | JAILHOUSE_MEM_IO_32, + }, + /* watchdog */ { + .phys_start = 0x01c20ca0, + .virt_start = 0x01c20ca0, + .size = 0x20, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO | JAILHOUSE_MEM_IO_32, + }, + /* MMIO 2 (permissive) */ { + .phys_start = 0x01c28000, + .virt_start = 0x01c28000, + .size = 0x9000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* MMIO 3 (permissive) */ { + .phys_start = 0x01f01000, + .virt_start = 0x01f01000, + .size = 0x3000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* RAM */ { + .phys_start = 0x40000000, + .virt_start = 0x40000000, + .size = 0xf700000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_EXECUTE, + }, + /* IVSHMEM shared memory region */ { + .phys_start = 0x4f700000, + .virt_start = 0x4f700000, + .size = 0x100000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE, + }, + }, + + .irqchips = { + /* GIC */ { + .address = 0x01c81000, + .pin_base = 32, + .pin_bitmap = { + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff + }, + }, + }, + + .pci_devices = { + { + .type = JAILHOUSE_PCI_TYPE_IVSHMEM, + .bdf = 0x00, + .bar_mask = { + 0xffffff00, 0xffffffff, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, + }, + .shmem_region = 7, + .shmem_protocol = JAILHOUSE_SHMEM_PROTO_VETH, + }, + }, +}; diff --git a/inmates/lib/arm/include/mach.h b/inmates/lib/arm/include/mach.h index 1d2cf51..a255947 100644 --- a/inmates/lib/arm/include/mach.h +++ b/inmates/lib/arm/include/mach.h @@ -39,6 +39,15 @@ #define TIMER_IRQ 27 +#elif defined(CONFIG_MACH_ORANGEPI0) +#define CON_TYPE "8250" +#define CON_BASE 0x01c28000 + +#define GICD_V2_BASE ((void *)0x01c81000) +#define GICC_V2_BASE ((void *)0x01c82000) + +#define TIMER_IRQ 27 + #elif defined(CONFIG_MACH_VEXPRESS) #define CON_TYPE "PL011" #define CON_BASE 0x1c090000 -- 2.1.4 -- You received this message because you are subscribed to the Google Groups "Jailhouse" group. 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