On 2017-06-23 19:33, Gustavo Lima Chaves wrote: > [...] > >>> >>> When I artificially block this interrupt after a while, I see the real time >>> jitter behaving almost perfectly. >>> >>> >>> Can you see how interrupt SPI storm ,though to the root cell, might damage >>> RT jitter on another cell? >>> >> >> The interrupt storm may be just one symptom of load on shared resources. >> Maybe the GPU or its driver are also issuing a high load of memory >> accesses or are otherwise stressing the shared interconnects. >> >> Looking at the hypervisor, there should be no interference between two >> cells if one receives lots of interrupts. Specifically, there is only >> one shared lock between both in irqchip.c (dist_lock), but it's taken >> only for a very short read-modify-write access. >> >> Jan > > What about Linux inmate cells on Intel? Has anybody else seem horrid timer > resolutions (like ".resolution: 1000000 nsecs") as well? The aforementioned > ARM patch makes no sense for the x86's version of time.c, I guess. Should we > be providing HPET address to the inmate the same way it's done for PM timer > address? Any other ideas?
What's your setup exactly? There is no need to use the slow HPET on x86 anymore, with or without Jailhouse. We now have the local APIC as reliable high-resolution and high-performance (because it's core-local) timer. And as reference clock, the PM timer is easily and cleanly exported to inmates - that's why we do that. Jan -- Siemens AG, Corporate Technology, CT RDA ITP SES-DE Corporate Competence Center Embedded Linux -- You received this message because you are subscribed to the Google Groups "Jailhouse" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. For more options, visit https://groups.google.com/d/optout.
