Commit 61e30277199e5 ("GICv3: Fix the GICD_IROUTER offset")
in ATF specifies that GICv3 documention mentions the wrong offset
about GICD_IROUTER and gives proper calculation for interrupt id.
Importing the same here.Signed-off-by: Lokesh Vutla <[email protected]> --- hypervisor/arch/arm-common/gic-v3.c | 2 +- hypervisor/arch/arm-common/include/asm/gic.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/hypervisor/arch/arm-common/gic-v3.c b/hypervisor/arch/arm-common/gic-v3.c index 5a2b9bc..12ad017 100644 --- a/hypervisor/arch/arm-common/gic-v3.c +++ b/hypervisor/arch/arm-common/gic-v3.c @@ -194,7 +194,7 @@ static void gic_cpu_shutdown(struct per_cpu *cpu_data) static void gic_adjust_irq_target(struct cell *cell, u16 irq_id) { - void *irouter = gicd_base + GICD_IROUTER - 32 + irq_id * 4; + void *irouter = gicd_base + GICD_IROUTER + 8 * irq_id; u32 route = mmio_read32(irouter); if (!cell_owns_cpu(cell, route)) diff --git a/hypervisor/arch/arm-common/include/asm/gic.h b/hypervisor/arch/arm-common/include/asm/gic.h index 2490042..35f48dc 100644 --- a/hypervisor/arch/arm-common/include/asm/gic.h +++ b/hypervisor/arch/arm-common/include/asm/gic.h @@ -38,7 +38,7 @@ #define GICD_SGIR 0x0f00 #define GICD_CPENDSGIR 0x0f10 #define GICD_SPENDSGIR 0x0f20 -#define GICD_IROUTER 0x6100 +#define GICD_IROUTER 0x6000 #define GICD_PIDR2_ARCH(pidr) (((pidr) & 0xf0) >> 4) -- 2.13.0 -- You received this message because you are subscribed to the Google Groups "Jailhouse" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. For more options, visit https://groups.google.com/d/optout.
