This demo start a secondary CPU, ans sends SGIs between two CPUs back
and forth. After some rounds of playing ping-pong, the secondary CPU is
shut down again.

Signed-off-by: Ralf Ramsauer <[email protected]>
---
 inmates/demos/arm/Makefile    |   3 +-
 inmates/demos/arm/psci-demo.c | 127 ++++++++++++++++++++++++++++++++++++++++++
 inmates/demos/arm64/Makefile  |   3 +-
 3 files changed, 131 insertions(+), 2 deletions(-)
 create mode 100644 inmates/demos/arm/psci-demo.c

diff --git a/inmates/demos/arm/Makefile b/inmates/demos/arm/Makefile
index b0fda4ed..5d0f9b5b 100644
--- a/inmates/demos/arm/Makefile
+++ b/inmates/demos/arm/Makefile
@@ -12,9 +12,10 @@
 
 include $(INMATES_LIB)/Makefile.lib
 
-INMATES := gic-demo.bin uart-demo.bin
+INMATES := gic-demo.bin uart-demo.bin psci-demo.bin
 
 gic-demo-y     := gic-demo.o
 uart-demo-y    := uart-demo.o
+psci-demo-y    := psci-demo.o
 
 $(eval $(call DECLARE_TARGETS,$(INMATES)))
diff --git a/inmates/demos/arm/psci-demo.c b/inmates/demos/arm/psci-demo.c
new file mode 100644
index 00000000..ed06be38
--- /dev/null
+++ b/inmates/demos/arm/psci-demo.c
@@ -0,0 +1,127 @@
+/*
+ * Jailhouse, a Linux-based partitioning hypervisor
+ *
+ * Copyright (c) OTH Regensburg, 2017
+ *
+ * Authors:
+ *  Ralf Ramsauer <[email protected]>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2.  See
+ * the COPYING file in the top-level directory.
+ *
+ * Alternatively, you can use or redistribute this file under the following
+ * BSD license:
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ * THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <mach.h>
+#include <inmate.h>
+#include <gic.h>
+#include <psci.h>
+
+#ifdef CONFIG_BARE_METAL
+#define PRIMARY_CPU   0
+#define SECONDARY_CPU 1
+#else
+#define PRIMARY_CPU   2
+#define SECONDARY_CPU 3
+#endif
+
+#define SGI 5
+
+#define SGI_ISSUE_OTHER_CPUS() gic_issue_sgi(1, 0, SGI)
+
+#if 0
+#define SGI_ISSUE_A() SGI_ISSUE_OTHER_CPUS()
+#define SGI_ISSUE_B() SGI_ISSUE_OTHER_CPUS()
+#else
+#define SGI_ISSUE_A() gic_issue_sgi(0, 1 << PRIMARY_CPU, SGI)
+#define SGI_ISSUE_B() gic_issue_sgi(0, 1 << SECONDARY_CPU, SGI)
+#endif
+
+static DEFINE_STACK(stack_secondary, 2, 2);
+
+static void handle_IRQ(unsigned int irqn)
+{
+       static unsigned int ctr = 0;
+       unsigned int my_cpu, request_cpu, sgi;
+
+       if (!is_sgi(irqn))
+               return;
+
+       sgi = sgi_id(irqn);
+       if (sgi != SGI)
+               return;
+
+       request_cpu = sgi_requesting_cpu(irqn);
+       my_cpu = cpu_id();
+
+       printk("SGI %u on CPU %u from CPU %u\n", sgi, my_cpu, request_cpu);
+
+       if (ctr == 100)
+               return;
+
+       if (++ctr == 100) {
+               printk("Offlining CPU %d\n", my_cpu);
+               psci_cpu_off();
+       }
+
+       if (my_cpu == PRIMARY_CPU)
+               SGI_ISSUE_B();
+       else if (my_cpu == SECONDARY_CPU)
+               SGI_ISSUE_A();
+       else
+               printk("Interrupt on unknown CPU!\n");
+}
+
+static void __attribute__((noreturn)) secondary_start(unsigned int 
processor_id)
+{
+       printk("Hello world from CPU %d\n", processor_id);
+       gic_init();
+
+       printk("Sending first SGI from CPU %d to CPU %d...\n", processor_id,
+                                                              PRIMARY_CPU);
+       SGI_ISSUE_A();
+
+       while(1)
+               asm volatile("wfi");
+}
+
+void inmate_main(void)
+{
+       unsigned long res;
+
+       printk("Starting on processor %u...\n", cpu_id());
+       printk("PSCI version: %x\n", psci_version());
+       printk("Initializing the GIC...\n");
+       gic_setup(handle_IRQ);
+       printk("Starting secondary CPU %d via PSCI...\n", SECONDARY_CPU);
+       res = psci_cpu_on(SECONDARY_CPU, secondary_start, &stack_secondary);
+       if (res)
+               printk("Unable to start CPU %u\n", SECONDARY_CPU);
+
+       while (1)
+               asm volatile("wfi");
+}
diff --git a/inmates/demos/arm64/Makefile b/inmates/demos/arm64/Makefile
index 49abe09b..e2527554 100644
--- a/inmates/demos/arm64/Makefile
+++ b/inmates/demos/arm64/Makefile
@@ -12,9 +12,10 @@
 
 include $(INMATES_LIB)/Makefile.lib
 
-INMATES := gic-demo.bin uart-demo.bin
+INMATES := gic-demo.bin psci-demo.bin uart-demo.bin
 
 gic-demo-y     := ../arm/gic-demo.o
+psci-demo-y    := ../arm/psci-demo.o
 uart-demo-y    := ../arm/uart-demo.o
 
 $(eval $(call DECLARE_TARGETS,$(INMATES)))
-- 
2.14.1

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