On 09/05/17 18:29, Jan Kiszka wrote:
> On 2017-09-05 16:43, Ralf Ramsauer wrote:
>> Hi,
>>
>> this RFC series adds PSCI support for ARM inmates.
>>
>> A new psci-demo inmate boots a secondary CPU and issues SGIs back and forth.
>> After some rounds, it shuts down the secondary CPU again.
>>
>> Tested in Jailhouse on a TK1 and TX1.
>> Tested on bare-metal on a TK1. (Note: U-Boot must not boot in HYP mode)
>>
>> Two important remarks:
>>   - I'm currently including headers from the hypervisor that are
>>     GPL-only. We recently switched to a dual-license for inmates.
>>
>>     I would like to avoid duplicating those headers.
> 
> That needs to be resolved, of course. What are you using exactly?
> 
>>   - When issuing SGI via routing mode 0 (send SGIs to CpuTargetList),
>>     then Jailhouse does not set the calling CPU id.
> 
> Patch, please, even more if you need this feature. Shouldn't be hard to
> fix for both GIC models.
Wrote a patch for for GICv2. I tried to patch GICv3/4 as well, but seems
like this feature is only available for GICv2.

IAR register of GICv2 and GICv3/4 differ: GICv2 has 10 bit IRQn and 3
Bit CPU ID, GICv3/4 has 24 bit IRQn and 8 bit reserved.

Nevertheless, this issue should be fixed for GICv2, will send a patch.

  Ralf
> 
>>
>> Not working:
>>   - PSCI support on bare-metal ARM64 without Jailhouse (WIP, I have some
>>     problems with activating interrupts on bare-metal, as u-boot boots into
>>     EL2...)
>>
>> Changes since the first RFC series:
>>   - Jan alread removed virt_id. This made my approach of removing it
>>     obselete. Removed those patches
>>   - Removed the TX1 non-root Linux inmate support patches, sent them
>>     separately
>>   - Switched to dual-license header
> 
> Thanks,
> Jan
> 

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