On 2017-09-14 17:02, Lokesh Vutla wrote: > Hi Jan, > > On 9/14/2017 7:39 PM, Jan Kiszka wrote: >> On 2017-09-14 16:03, Jan Kiszka wrote: >>> On 2017-09-14 10:35, Lokesh Vutla wrote: >>>> From: Lokesh Vutla <[email protected]> >>>> >>>> arm: Add arch specific sysreg definitions >>>> >>>> Changes since v1: >>>> - Fixed build error with ARM. >>>> >>>> Lokesh Vutla (2): >>>> arm: gicv3: Add arch specific List registers acccesses >>>> arm: gicv3: Add arch specific sgi1r_el1 register definition >>>> >>>> Nikhil Devshatwar (1): >>>> arm64: Add sysreg macro definitions >>>> >>>> hypervisor/arch/arm/gic-v3.c | 19 +++------ >>>> hypervisor/arch/arm/include/asm/arch_gicv3.h | 53 >>>> ++++++++++++++++++++++++++ >>>> hypervisor/arch/arm/include/asm/gic_v3.h | 8 +--- >>>> hypervisor/arch/arm64/include/asm/arch_gicv3.h | 30 +++++++++++++++ >>>> hypervisor/arch/arm64/include/asm/sysregs.h | 9 ++++- >>>> hypervisor/include/jailhouse/string.h | 8 ++++ >>>> 6 files changed, 105 insertions(+), 22 deletions(-) >>>> create mode 100644 hypervisor/arch/arm/include/asm/arch_gicv3.h >>>> create mode 100644 hypervisor/arch/arm64/include/asm/arch_gicv3.h >>>> >>> >>> Looks good, didn't break any build so far, so I picked them up for next. >>> >>> I suppose the gic-v3 moving patches require some rebasing now, don't they? >> >> It did, but that was trivial. Will show up in next soon. > > You might want to remove the guard for gicv3_irqchip in irqchip_init() > like here: http://pastebin.ubuntu.com/25534357/
Indeed, thanks. > > Also, don't we need the patch (5ec520f arm64: Dispatch ICC_SGI1R > accesses) as well? Also true. Obviously, nothing was tested yet. :) Thanks, Jan -- Siemens AG, Corporate Technology, CT RDA ITP SES-DE Corporate Competence Center Embedded Linux -- You received this message because you are subscribed to the Google Groups "Jailhouse" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. For more options, visit https://groups.google.com/d/optout.
