On 2017-11-27 11:04, Henning Schild wrote:
> You probably also want to update Documentation/hypervisor-interfaces.txt
> 

Good point, thanks.

Jan

> Henning
> 
> Am Mon, 27 Nov 2017 08:40:41 +0100
> schrieb "[ext] Jan Kiszka" <[email protected]>:
> 
>> From: Jan Kiszka <[email protected]>
>>
>> This avoids that non-root cells have to calibrate TSC and - provided
>> there is no TSC deadline timer support - APIC timer frequencies
>> themselves. Rather we now either use statically configured values from
>> the system configuration or, of those or 0, pick them up from the root
>> cell during hypervisor start. Then the values are simply forwarded via
>> the Communication Region to all x86 non-root cells.
>>
>> This requires another patch to the root-cell Linux to export
>> lapic_timer_frequency for us.
>>
>> CC: Thomas Gleixner <[email protected]>
>> Signed-off-by: Jan Kiszka <[email protected]>
>> ---
>>  driver/main.c                                         |  8 ++++++++
>>  hypervisor/arch/x86/control.c                         | 11
>> +++++++---- hypervisor/arch/x86/include/asm/jailhouse_hypercall.h |
>> 5 +++++ hypervisor/include/jailhouse/cell-config.h            |  4
>> +++- tools/jailhouse-cell-linux                            |  2 +-
>>  tools/jailhouse-hardware-check                        |  4 ++--
>>  6 files changed, 26 insertions(+), 8 deletions(-)
>>
>> diff --git a/driver/main.c b/driver/main.c
>> index 5b38d6f4..af4930f3 100644
>> --- a/driver/main.c
>> +++ b/driver/main.c
>> @@ -506,6 +506,14 @@ static int jailhouse_cmd_enable(struct
>> jailhouse_system __user *arg) console_available =
>> CON2_TYPE(config->debug_console.flags) ==
>> JAILHOUSE_CON2_TYPE_ROOTPAGE; 
>> +#ifdef CONFIG_X86
>> +    if (config->platform_info.x86.tsc_khz == 0)
>> +            config->platform_info.x86.tsc_khz = tsc_khz;
>> +    if (config->platform_info.x86.apic_khz == 0)
>> +            config->platform_info.x86.apic_khz =
>> +                    lapic_timer_frequency / (1000 / HZ);
>> +#endif
>> +
>>      err = jailhouse_cell_prepare_root(&config->root_cell);
>>      if (err)
>>              goto error_unmap;
>> diff --git a/hypervisor/arch/x86/control.c
>> b/hypervisor/arch/x86/control.c index a37ccd28..2445f3a6 100644
>> --- a/hypervisor/arch/x86/control.c
>> +++ b/hypervisor/arch/x86/control.c
>> @@ -32,6 +32,7 @@ struct exception_frame {
>>  
>>  int arch_cell_create(struct cell *cell)
>>  {
>> +    struct jailhouse_comm_region *comm_region =
>> &cell->comm_page.comm_region; unsigned int cpu;
>>      int err;
>>  
>> @@ -51,13 +52,15 @@ int arch_cell_create(struct cell *cell)
>>      if (err)
>>              goto error_ioapic_exit;
>>  
>> -    cell->comm_page.comm_region.pm_timer_address =
>> +    comm_region->pm_timer_address =
>>              system_config->platform_info.x86.pm_timer_address;
>> -    cell->comm_page.comm_region.pci_mmconfig_base =
>> +    comm_region->pci_mmconfig_base =
>>              system_config->platform_info.pci_mmconfig_base;
>> -    cell->comm_page.comm_region.num_cpus = 0;
>> +    comm_region->num_cpus = 0;
>>      for_each_cpu(cpu, cell->cpu_set)
>> -            cell->comm_page.comm_region.num_cpus++;
>> +            comm_region->num_cpus++;
>> +    comm_region->tsc_khz =
>> system_config->platform_info.x86.tsc_khz;
>> +    comm_region->apic_khz =
>> system_config->platform_info.x86.apic_khz; 
>>      return 0;
>>  
>> diff --git a/hypervisor/arch/x86/include/asm/jailhouse_hypercall.h
>> b/hypervisor/arch/x86/include/asm/jailhouse_hypercall.h index
>> ad4ba3e5..0f4782c2 100644 ---
>> a/hypervisor/arch/x86/include/asm/jailhouse_hypercall.h +++
>> b/hypervisor/arch/x86/include/asm/jailhouse_hypercall.h @@ -105,6
>> +105,11 @@ struct jailhouse_comm_region { __u16 pm_timer_address;
>>      /** Number of CPUs available to the cell (x86-specific). */
>>      __u16 num_cpus;
>> +    /** Calibrated TSC frequency in kHz (x86-specific). */
>> +    __u32 tsc_khz;
>> +    /** Calibrated APIC timer frequency in kHz or 0 if TSC
>> deadline timer
>> +     * is available (x86-specific). */
>> +    __u32 apic_khz;
>>  };
>>  
>>  /**
>> diff --git a/hypervisor/include/jailhouse/cell-config.h
>> b/hypervisor/include/jailhouse/cell-config.h index 559cf51c..cf50ef84
>> 100644 --- a/hypervisor/include/jailhouse/cell-config.h
>> +++ b/hypervisor/include/jailhouse/cell-config.h
>> @@ -43,7 +43,7 @@
>>   * Incremented on any layout or semantic change of system or cell
>> config.
>>   * Also update HEADER_REVISION in tools.
>>   */
>> -#define JAILHOUSE_CONFIG_REVISION   7
>> +#define JAILHOUSE_CONFIG_REVISION   8
>>  
>>  #define JAILHOUSE_CELL_NAME_MAXLEN  31
>>  
>> @@ -243,6 +243,8 @@ struct jailhouse_system {
>>                              __u32 vtd_interrupt_limit;
>>                              __u8 apic_mode;
>>                              __u8 padding[3];
>> +                            __u32 tsc_khz;
>> +                            __u32 apic_khz;
>>                              struct jailhouse_iommu
>>                                      iommu_units[JAILHOUSE_MAX_IOMMU_UNITS];
>>                      } __attribute__((packed)) x86;
>> diff --git a/tools/jailhouse-cell-linux b/tools/jailhouse-cell-linux
>> index 20c67ce4..e693bd02 100755
>> --- a/tools/jailhouse-cell-linux
>> +++ b/tools/jailhouse-cell-linux
>> @@ -531,7 +531,7 @@ class Irqchip:
>>  
>>  class Config:
>>      _HEADER_FORMAT = '6sH32s4xIIIIIIIIIQ8x'
>> -    _HEADER_REVISION = 7
>> +    _HEADER_REVISION = 8
>>  
>>      def __init__(self, config_file):
>>          self.data = config_file.read()
>> diff --git a/tools/jailhouse-hardware-check
>> b/tools/jailhouse-hardware-check index 357280d1..67d3b078 100755
>> --- a/tools/jailhouse-hardware-check
>> +++ b/tools/jailhouse-hardware-check
>> @@ -109,11 +109,11 @@ class Sysconfig:
>>      MMCFGBASE_SIZE = 8
>>      MMCFGENDBUS_SIZE = 1
>>      PCIISVIRT_SIZE = 1
>> -    X86_PADDING = 10
>> +    X86_PADDING = 18
>>      X86_MAX_IOMMU_UNITS = 8
>>      X86_IOMMU_SIZE = 20
>>  
>> -    HEADER_REVISION = 7
>> +    HEADER_REVISION = 8
>>      HEADER_FORMAT = '6sH'
>>  
>>      def __init__(self, path):
> 


-- 
Siemens AG, Corporate Technology, CT RDA ITP SES-DE
Corporate Competence Center Embedded Linux

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