Hi,
I tried to run centOS userland initrd from non root cell of tx1 but it has
crashed with below messages.Please share your input how to address this issue
w.r.t jailhouse.
[ OK ] Started Command Scheduler.
Starting Command Scheduler...
Starting Wait for Plymouth Boot Screen to Quit...
Starting Terminate Plymouth Boot Screen...
Unhandled data read at 0xf0000(8)
FATAL: unhandled trap (exception class 0x24)
Cell state before exception:
pc: 000003ff80b14890 lr: 000003ff80b14870 spsr: a0000000 EL0
sp: 000003ffd25dbbf0 esr: 24 1 1c38007
x0: 0000000014fc0010 x1: 000003ff80a80000 x2: 0000000000002000
x3: ffffffffffffffff x4: 0000000000000003 x5: 00000000000f0000
x6: 000000000000007c x7: 0000000000000023 x8: 00000000000000de
x9: 000000000008a718 x10: 00000000ffffffff x11: 000000000040e4f8
x12: 0000000000000008 x13: 0000000000000000 x14: 000003ff80a91a94
x15: 0000000000005749 x16: 0000000000430000 x17: 000003ff80b147b0
x18: 000003ffd25db9f0 x19: 0000000014fc0010 x20: 0000000014fc0010
x21: 000003ff80a80000 x22: 0000000000010000 x23: 0000000000000000
x24: 0000000000430000 x25: 000000000040e4f8 x26: 000003ff80a80000
x27: 0000000000010000 x28: 0000000000000000 x29: 000003ffd25dbbf0
Parking CPU 3 (Cell: "jetson-tx1-linux-demo")
-Munees
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/*
* Jailhouse, a Linux-based partitioning hypervisor
*
* Configuration for linux-demo inmate on Jetson TX1:
* 2 CPUs, 428M RAM, serial port D
*
* Copyright (c) OTH Regensburg, 2017
*
* Authors:
* Ralf Ramsauer <[email protected]>
*
* This work is licensed under the terms of the GNU GPL, version 2. See
* the COPYING file in the top-level directory.
*
* Note: the root Linux should be started with "mem=3584M"
*/
#include <jailhouse/types.h>
#include <jailhouse/cell-config.h>
#define ARRAY_SIZE(a) sizeof(a) / sizeof(a[0])
#ifndef CONFIG_INMATE_BASE
#define CONFIG_INMATE_BASE 0x0
#endif
struct {
struct jailhouse_cell_desc cell;
__u64 cpus[1];
struct jailhouse_memory mem_regions[5];
struct jailhouse_irqchip irqchips[2];
struct jailhouse_pci_device pci_devices[1];
} __attribute__((packed)) config = {
.cell = {
.signature = JAILHOUSE_CELL_DESC_SIGNATURE,
.revision = JAILHOUSE_CONFIG_REVISION,
.name = "linux-nrc",
.flags = JAILHOUSE_CELL_PASSIVE_COMMREG |
JAILHOUSE_CELL_DEBUG_CONSOLE,
.cpu_set_size = sizeof(config.cpus),
.num_memory_regions = ARRAY_SIZE(config.mem_regions),
.num_irqchips = ARRAY_SIZE(config.irqchips),
.num_pci_devices = ARRAY_SIZE(config.pci_devices),
.vpci_irq_base = 152,
.cpu_reset_address = CONFIG_INMATE_BASE,
},
.cpus = {
0xc,
},
.mem_regions = {
/* UART */ {
.phys_start = 0x70006000,
.virt_start = 0x70006000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO | JAILHOUSE_MEM_ROOTSHARED,
},
/* RAM */ {
.phys_start = 0x17bef0000,
.virt_start = CONFIG_INMATE_BASE,
.size = 0x10000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA |
JAILHOUSE_MEM_LOADABLE,
},
/* RAM */ {
.phys_start = 0x141ef0000,
.virt_start = 0xa8000000,
.size = 0x3a000000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA |
JAILHOUSE_MEM_LOADABLE,
},
/* IVSHMEM shared memory region */ {
.phys_start = 0x17bf00000,
.virt_start = 0x17bf00000,
.size = 0x100000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_ROOTSHARED,
},
},
.irqchips = {
/* GIC */ {
.address = 0x50041000,
.pin_base = 32,
.pin_bitmap = {
0, (1 << (36 % 32)), 0, 0
},
},
/* GIC */ {
.address = 0x50041000,
.pin_base = 160,
.pin_bitmap = {
1 << (152+32 - 160),
},
},
},
.pci_devices = {
/* 00:00.0 */ {
.type = JAILHOUSE_PCI_TYPE_IVSHMEM,
.bdf = 0x00,
.bar_mask = {
0xffffff00, 0xffffffff, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.shmem_region = 3,
.shmem_protocol = JAILHOUSE_SHMEM_PROTO_VETH,
},
},
};
/*
* Jailhouse Jetson TX1 support
*
* Copyright (C) 2016 Evidence Srl
*
* Authors:
* Claudio Scordino <[email protected]>
* Bruno Morelli <[email protected]>
*
* This work is licensed under the terms of the GNU GPL, version 2. See
* the COPYING file in the top-level directory.
*
* NOTE: Add "mem=3968M vmalloc=512M" to the kernel command line.
*/
#include <jailhouse/types.h>
#include <jailhouse/cell-config.h>
#define ARRAY_SIZE(a) (sizeof(a) / sizeof(a[0]))
struct {
struct jailhouse_system header;
__u64 cpus[1];
struct jailhouse_memory mem_regions[43];
struct jailhouse_irqchip irqchips[2];
struct jailhouse_pci_device pci_devices[1];
} __attribute__((packed)) config = {
.header = {
.signature = JAILHOUSE_SYSTEM_SIGNATURE,
.revision = JAILHOUSE_CONFIG_REVISION,
.hypervisor_memory = {
.phys_start = 0x17c000000,
.size = 0x4000000,
},
.debug_console = {
.address = 0x70006000,
.size = 0x0040,
.flags = JAILHOUSE_CON1_TYPE_8250 |
JAILHOUSE_CON1_ACCESS_MMIO |
JAILHOUSE_CON1_REGDIST_4 |
JAILHOUSE_CON2_TYPE_ROOTPAGE,
},
.platform_info = {
.pci_mmconfig_base = 0x48000000,
.pci_mmconfig_end_bus = 0,
.pci_is_virtual = 1,
.arm = {
.gic_version = 2,
.gicd_base = 0x50041000,
.gicc_base = 0x50042000,
.gich_base = 0x50044000,
.gicv_base = 0x50046000,
.maintenance_irq = 25,
}
},
.root_cell = {
.name = "tx1-root",
.cpu_set_size = sizeof(config.cpus),
.num_memory_regions = ARRAY_SIZE(config.mem_regions),
.num_irqchips = ARRAY_SIZE(config.irqchips),
.num_pci_devices = ARRAY_SIZE(config.pci_devices),
.vpci_irq_base = 148,
},
},
.cpus = {
0xf,
},
.mem_regions = {
/* APE 1 */ {
.phys_start = 0x00000000,
.virt_start = 0x00000000,
.size = 0x00D00000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* PCIE */ {
.phys_start = 0x01000000,
.virt_start = 0x01000000,
.size = 0x3F000000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* Data memory */ {
.phys_start = 0x040000000,
.virt_start = 0x040000000,
.size = 0x1000000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* host1x */ {
.phys_start = 0x50000000,
.virt_start = 0x50000000,
.size = 0x40000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* Graphics Host */ {
.phys_start = 0x54000000,
.virt_start = 0x54000000,
.size = 0x1000000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* GPU */ {
.phys_start = 0x57000000,
.virt_start = 0x57000000,
.size = 0x9000000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* Semaphores */ {
.phys_start = 0x60000000,
.virt_start = 0x60000000,
.size = 0x4000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* Legacy Interrupt Controller (ICTRL) */ {
.phys_start = 0x60004000,
.virt_start = 0x60004000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* TMR */ {
.phys_start = 0x60005000,
.virt_start = 0x60005000,
.size = 0x01000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* Clock and Reset */ {
.phys_start = 0x60006000,
.virt_start = 0x60006000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* Flow Controller */ {
.phys_start = 0x60007000,
.virt_start = 0x60007000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* AHB-DMA */ {
.phys_start = 0x60008000,
.virt_start = 0x60008000,
.size = 0x2000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* System registers, secure boot, activity monitor */ {
.phys_start = 0x6000c000,
.virt_start = 0x6000c000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* GPIOs + exception vectors */ {
.phys_start = 0x6000d000,
.virt_start = 0x6000d000,
.size = 0x2000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* IPATCH */ {
.phys_start = 0x60010000,
.virt_start = 0x60010000,
.size = 0x0010000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* APB-DMA + VGPIO */ {
.phys_start = 0x60020000,
.virt_start = 0x60020000,
.size = 0x5000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* MISC stuff (see datasheet) */ {
.phys_start = 0x70000000,
.virt_start = 0x70000000,
.size = 0x4000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* UARTs */ {
.phys_start = 0x70006000,
.virt_start = 0x70006000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* PWM Controller */ {
.phys_start = 0x7000a000,
.virt_start = 0x7000a000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* I2C + SPI*/ {
.phys_start = 0x7000c000,
.virt_start = 0x7000c000,
.size = 0x2000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* RTC + PMC + FUSE + KFUSE */ {
.phys_start = 0x7000e000,
.virt_start = 0x7000e000,
.size = 0x2000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* Sensors */ {
.phys_start = 0x70010000,
.virt_start = 0x70010000,
.size = 0x0008000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* MC */ {
.phys_start = 0x70019000,
.virt_start = 0x70019000,
.size = 0x7000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* SATA */ {
.phys_start = 0x70020000,
.virt_start = 0x70020000,
.size = 0x0010000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* HDA */ {
.phys_start = 0x70030000,
.virt_start = 0x70030000,
.size = 0x10000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* CLUSTER CLOCK */ {
.phys_start = 0x70040000,
.virt_start = 0x70040000,
.size = 0x0040000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* XUSB */ {
.phys_start = 0x70090000,
.virt_start = 0x70090000,
.size = 0x10000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* DDS */ {
.phys_start = 0x700a0000,
.virt_start = 0x700a0000,
.size = 0x0002000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* SDMMCs */ {
.phys_start = 0x700b0000,
.virt_start = 0x700b0000,
.size = 0x5000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* SPEEDO */ {
.phys_start = 0x700c0000,
.virt_start = 0x700c0000,
.size = 0x0008000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* DP2 + APB2JTAG */ {
.phys_start = 0x700e0000,
.virt_start = 0x700e0000,
.size = 0x0002000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* SOC_THERM */ {
.phys_start = 0x700e2000,
.virt_start = 0x700e2000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* MIPI_CAL */ {
.phys_start = 0x700e3000,
.virt_start = 0x700e3000,
.size = 0x100,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* SYSCTR0 */ {
.phys_start = 0x700f0000,
.virt_start = 0x700f0000,
.size = 0x0010000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* SYSCTR1 */ {
.phys_start = 0x70100000,
.virt_start = 0x70100000,
.size = 0x0010000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* DVFS */ {
.phys_start = 0x70110000,
.virt_start = 0x70110000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* APE 2 */ {
.phys_start = 0x702c0000,
.virt_start = 0x702c0000,
.size = 0x40000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* QSPI */ {
.phys_start = 0x70410000,
.virt_start = 0x70410000,
.size = 0x0001000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* STM + CSITE */ {
.phys_start = 0x71000000,
.virt_start = 0x71000000,
.size = 0x2000000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* AHB_A1 */ {
.phys_start = 0x78000000,
.virt_start = 0x78000000,
.size = 0x1000000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* AHB_A2 or USB */ {
.phys_start = 0x7c000000,
.virt_start = 0x7c000000,
.size = 0x2000000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* System RAM */ {
.phys_start = 0x80000000,
.virt_start = 0x80000000,
.size = 0xfc000000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE,
},
/* IVSHMEM shared memory region */ {
.phys_start = 0x17bf00000,
.virt_start = 0x17bf00000,
.size = 0x100000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
},
.irqchips = {
/* GIC */ {
.address = 0x50041000,
.pin_base = 32,
.pin_bitmap = {
0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
},
},
/* GIC */ {
.address = 0x50041000,
.pin_base = 160,
.pin_bitmap = {
0xffffffff, 0xffffffff
},
},
},
.pci_devices = {
/* 00:00.0 */ {
.type = JAILHOUSE_PCI_TYPE_IVSHMEM,
.bdf = 0x00,
.bar_mask = {
0xffffff00, 0xffffffff, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.shmem_region = 42,
.shmem_protocol = JAILHOUSE_SHMEM_PROTO_VETH,
},
},
};
