Branch: refs/heads/next
Home: https://github.com/siemens/jailhouse
Commit: 5b0953df77d0e1dfde15b6cf3865529375cd21d5
https://github.com/siemens/jailhouse/commit/5b0953df77d0e1dfde15b6cf3865529375cd21d5
Author: Jan Kiszka <[email protected]>
Date: 2018-04-20 (Fri, 20 Apr 2018)
Changed paths:
M hypervisor/arch/arm-common/Kbuild
M hypervisor/arch/arm/Kbuild
M hypervisor/arch/arm64/Kbuild
M hypervisor/arch/x86/Kbuild
M inmates/lib/arm-common/Makefile.lib
M inmates/lib/arm/Makefile
M inmates/lib/arm64/Makefile
Log Message:
-----------
build: Cosmetic improvements for COMMON_OBJECTS variables
Rename COMMON_OBJECTS to common-objs-y so that optional objects can more
easily be appended. Also decapitalize OBJS-y to be visually more
friendly.
No functional changes.
Signed-off-by: Jan Kiszka <[email protected]>
Commit: 26390874d6484be0c70ce542f2db83ac7539fc84
https://github.com/siemens/jailhouse/commit/26390874d6484be0c70ce542f2db83ac7539fc84
Author: Jan Kiszka <[email protected]>
Date: 2018-04-20 (Fri, 20 Apr 2018)
Changed paths:
M hypervisor/Makefile
Log Message:
-----------
build: Add a dummy recipe to ensure evaluation of arch subdir results
Without this, make may skip over relinking the core against the arch
subdir results while the latter is still being built. This was
reproducible by touching an architecture file and then rebuild with -j.
Fixes: f5a0a36601c2 ("core: Rework architecture subdir build")
Signed-off-by: Jan Kiszka <[email protected]>
Commit: 8fb439f864dcdd59cdafaa54324adcd3a89879a4
https://github.com/siemens/jailhouse/commit/8fb439f864dcdd59cdafaa54324adcd3a89879a4
Author: Jan Kiszka <[email protected]>
Date: 2018-04-20 (Fri, 20 Apr 2018)
Changed paths:
M hypervisor/arch/x86/Kbuild
A hypervisor/arch/x86/test-device.c
M include/jailhouse/cell-config.h
Log Message:
-----------
x86: Add MMIO access test device
On x86, we unfortunately need to parse the guest instruction that
triggered an MMIO access interception. This parser started to be small
and simple - and then real life bit. It already passed the point where
we should have added systematic tests.
This is the hypervisor-located building block for such tests. The test
creates a MMIO target page right after the Communication Page. Write
accesses to the virtual registers 0xff8..0xfff are stored per cell, read
accesses reproduce that written value. The virtual registers are backed
by the Communication Page of the same cell at the same address, thus
create a second channel to validate accesses.
This test device is optional, configured in during build time by setting
CONFIG_TEST_DEVICE in config.h and during runtime by adding
JAILHOUSE_CELL_TEST_DEVICE to the cell's config flags.
Signed-off-by: Jan Kiszka <[email protected]>
Commit: bba1d4a082e34ff6295064e85c33bcf0fc4d7bf3
https://github.com/siemens/jailhouse/commit/bba1d4a082e34ff6295064e85c33bcf0fc4d7bf3
Author: Jan Kiszka <[email protected]>
Date: 2018-04-23 (Mon, 23 Apr 2018)
Changed paths:
M configs/x86/tiny-demo.c
M inmates/Makefile
A inmates/tests/arm/Makefile
A inmates/tests/arm64/Makefile
A inmates/tests/x86/Makefile
A inmates/tests/x86/mmio-access.c
Log Message:
-----------
inmates: x86: Add test case for MMIO accessing instructions
This lays the ground for systematic tests of the MMIO instruction parser
in x86. The test-case inmate uses the new MMIO access test device for
writing and reading with yet a small number of instructions variants.
This is supposed to expanded later on with further patterns - but it
already revealed several bugs in the handling of immediate writes.
Signed-off-by: Jan Kiszka <[email protected]>
Commit: adbcf414b6705353eeafe553622d5da0f374935c
https://github.com/siemens/jailhouse/commit/adbcf414b6705353eeafe553622d5da0f374935c
Author: Jan Kiszka <[email protected]>
Date: 2018-04-23 (Mon, 23 Apr 2018)
Changed paths:
M hypervisor/arch/x86/mmio.c
Log Message:
-----------
x86: mmio: Fix instruction length calculation for write-immediate
This fixes one case around mov imm,<addr>: We read the immediate value
to be written, but we forgot to update inst_len. This fixes that issue
by moving the update from ctx.count to inst.inst_len to the very end
of the parser.
Fixes: 95202a038b9e ("x86,mmio: Add support for 1 more instructions on
the MMIO dispatcher")
Signed-off-by: Jan Kiszka <[email protected]>
Commit: 40d3e67932e4fdc7de7bb0d6db608eee52a84152
https://github.com/siemens/jailhouse/commit/40d3e67932e4fdc7de7bb0d6db608eee52a84152
Author: Jan Kiszka <[email protected]>
Date: 2018-04-23 (Mon, 23 Apr 2018)
Changed paths:
M hypervisor/arch/x86/mmio.c
Log Message:
-----------
x86: mmio: Fix handling of displacement bytes when writing immediates
We only skipped over 32-bit displacements in mod 0 so far. But mod 1 and
2 can bring them as well. Moreover, we incremented inst_len even when
skipping via ctx_update, which accounted the displacement twice.
Fix this by pulling out the displacement skip, moving it before the
immediate retrieval. If there is no immediate to read, directly add the
displacement length to inst_len.
Fixes: 95202a038b9e ("x86,mmio: Add support for 1 more instructions on
the MMIO dispatcher")
Signed-off-by: Jan Kiszka <[email protected]>
Commit: 80daf2b75fef808ad27599fc3b3a7da471cf5b57
https://github.com/siemens/jailhouse/commit/80daf2b75fef808ad27599fc3b3a7da471cf5b57
Author: Jan Kiszka <[email protected]>
Date: 2018-04-23 (Mon, 23 Apr 2018)
Changed paths:
M hypervisor/arch/x86/mmio.c
Log Message:
-----------
x86: mmio: Reliably identify mov immediate instructions
The opcode of mov imm,<mem> also consists of reg=0 in the ModR/M byte.
Make sure that we do not misinterpret an instruction.
Fixes: 95202a038b9e ("x86,mmio: Add support for 1 more instructions on
the MMIO dispatcher")
Signed-off-by: Jan Kiszka <[email protected]>
Commit: 25804a31f5e084452ced7a984a6463aa35b96366
https://github.com/siemens/jailhouse/commit/25804a31f5e084452ced7a984a6463aa35b96366
Author: Jan Kiszka <[email protected]>
Date: 2018-04-23 (Mon, 23 Apr 2018)
Changed paths:
M hypervisor/arch/x86/mmio.c
Log Message:
-----------
x86: mmio: Sign-extend immediate of 64-bit mov
The immediate value of mov imm,<mem> is still 32-bit in case of a 64-bit
write, but it has to be sign-extended in that case. Add the missing
logic.
Fixes: 95202a038b9e ("x86,mmio: Add support for 1 more instructions on
the MMIO dispatcher")
Signed-off-by: Jan Kiszka <[email protected]>
Commit: bb27c192912178f0791f4ae753490a66da908b98
https://github.com/siemens/jailhouse/commit/bb27c192912178f0791f4ae753490a66da908b98
Author: Jan Kiszka <[email protected]>
Date: 2018-04-23 (Mon, 23 Apr 2018)
Changed paths:
M hypervisor/arch/x86/mmio.c
Log Message:
-----------
x86: mmio: Complete SIB + displacement support
The case of mod=1 or 2 and rm = 4 (SIB) is easy to handle because we do
not need to evaluate the SIB byte and can simply skip over it.
Signed-off-by: Jan Kiszka <[email protected]>
Commit: ad5d406d0cc75c315ee84d974f121e3578b35e84
https://github.com/siemens/jailhouse/commit/ad5d406d0cc75c315ee84d974f121e3578b35e84
Author: Jan Kiszka <[email protected]>
Date: 2018-04-23 (Mon, 23 Apr 2018)
Changed paths:
M hypervisor/arch/x86/mmio.c
Log Message:
-----------
x86: mmio: Refactor code for mod=0 handling
This just improves readability and makes the code more compact. The
rm cases are now dispatched in ascending order.
Signed-off-by: Jan Kiszka <[email protected]>
Commit: 5feed796f604df8a4c90c43116933130f69599aa
https://github.com/siemens/jailhouse/commit/5feed796f604df8a4c90c43116933130f69599aa
Author: Jan Kiszka <[email protected]>
Date: 2018-04-23 (Mon, 23 Apr 2018)
Changed paths:
M hypervisor/arch/x86/apic.c
M hypervisor/arch/x86/include/asm/apic.h
M hypervisor/arch/x86/include/asm/mmio.h
M hypervisor/arch/x86/include/asm/vcpu.h
M hypervisor/arch/x86/mmio.c
M hypervisor/arch/x86/svm.c
M hypervisor/arch/x86/vcpu.c
M hypervisor/arch/x86/vmx.c
Log Message:
-----------
x86: Split up vcpu_vendor_get_execution_state
Rather than always pulling the four fields of vcpu_execution_state at
once, introduce individual accessor functions. This allows to reduce the
number of expensive vmcs_read operations on Intel to 2 for typical
hypercalls and all MMIO interceptions.
Signed-off-by: Jan Kiszka <[email protected]>
Commit: 99136353dac8363e570c96c3eaafa60247c14bee
https://github.com/siemens/jailhouse/commit/99136353dac8363e570c96c3eaafa60247c14bee
Author: Jan Kiszka <[email protected]>
Date: 2018-04-23 (Mon, 23 Apr 2018)
Changed paths:
M hypervisor/arch/x86/mmio.c
Log Message:
-----------
x86: mmio: Fix parsing for mov ax to/from mem in 64-bit mode
In long mode, we have 64-bit addresses by default, and so we need to
skip over 8 bytes of address for that instruction.
Fixes: ea43ce86f4e3 ("x86,mmio: Add support for 2 more instructions on
the MMIO dispatcher")
Signed-off-by: Jan Kiszka <[email protected]>
Commit: 8288aefc87cb03b3f3bb8ab832c41fd0370a080a
https://github.com/siemens/jailhouse/commit/8288aefc87cb03b3f3bb8ab832c41fd0370a080a
Author: Jan Kiszka <[email protected]>
Date: 2018-04-23 (Mon, 23 Apr 2018)
Changed paths:
M hypervisor/arch/x86/mmio.c
Log Message:
-----------
x86: Remove misleading brackets from mmio instruction dump
The parser my bail out on opcode byte 0-2.
Signed-off-by: Jan Kiszka <[email protected]>
Compare:
https://github.com/siemens/jailhouse/compare/1a93a245d210...8288aefc87cb
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