From: Jan Kiszka <[email protected]> This encodes the domain number the virtual PCI host controller should use. 0..0xfffe are explicitly assigned numbers, 0xffff (-1) is used to encode the previous semantic: the guest assigns the number itself.
Set all configs with active virtual PCI controllers and known existence of real PCI hosts to -1 in order to preserve the current behavior. Signed-off-by: Jan Kiszka <[email protected]> --- configs/arm/jetson-tk1.c | 1 + configs/arm64/espressobin.c | 1 + configs/arm64/hikey.c | 1 + configs/arm64/jetson-tx1.c | 1 + configs/arm64/qemu-arm64.c | 1 + configs/arm64/zynqmp-zcu102.c | 1 + include/jailhouse/cell-config.h | 3 ++- tools/jailhouse-cell-linux | 2 +- tools/jailhouse-hardware-check | 5 +++-- 9 files changed, 12 insertions(+), 4 deletions(-) diff --git a/configs/arm/jetson-tk1.c b/configs/arm/jetson-tk1.c index bc203734e..cafa434e3 100644 --- a/configs/arm/jetson-tk1.c +++ b/configs/arm/jetson-tk1.c @@ -49,6 +49,7 @@ struct { .pci_mmconfig_base = 0x48000000, .pci_mmconfig_end_bus = 0, .pci_is_virtual = 1, + .pci_domain = -1, .arm = { .gic_version = 2, .gicd_base = 0x50041000, diff --git a/configs/arm64/espressobin.c b/configs/arm64/espressobin.c index 35d8500d6..291644be1 100644 --- a/configs/arm64/espressobin.c +++ b/configs/arm64/espressobin.c @@ -45,6 +45,7 @@ struct { .pci_mmconfig_base = 0xfc000000, .pci_mmconfig_end_bus = 0, .pci_is_virtual = 1, + .pci_domain = -1, .arm = { .gic_version = 3, .gicd_base = 0xd1d00000, diff --git a/configs/arm64/hikey.c b/configs/arm64/hikey.c index 47d71a426..a31a00a44 100644 --- a/configs/arm64/hikey.c +++ b/configs/arm64/hikey.c @@ -43,6 +43,7 @@ struct { .pci_mmconfig_base = 0xf6000000, .pci_mmconfig_end_bus = 0, .pci_is_virtual = 1, + .pci_domain = -1, .arm = { .gic_version = 2, .gicd_base = 0xf6801000, diff --git a/configs/arm64/jetson-tx1.c b/configs/arm64/jetson-tx1.c index c0e997d83..2a70196dd 100644 --- a/configs/arm64/jetson-tx1.c +++ b/configs/arm64/jetson-tx1.c @@ -46,6 +46,7 @@ struct { .pci_mmconfig_base = 0x48000000, .pci_mmconfig_end_bus = 0, .pci_is_virtual = 1, + .pci_domain = -1, .arm = { .gic_version = 2, diff --git a/configs/arm64/qemu-arm64.c b/configs/arm64/qemu-arm64.c index 0ea5d9f04..2646e7a66 100644 --- a/configs/arm64/qemu-arm64.c +++ b/configs/arm64/qemu-arm64.c @@ -45,6 +45,7 @@ struct { .pci_mmconfig_base = 0x07000000, .pci_mmconfig_end_bus = 0, .pci_is_virtual = 1, + .pci_domain = -1, .arm = { .gic_version = 3, .gicd_base = 0x08000000, diff --git a/configs/arm64/zynqmp-zcu102.c b/configs/arm64/zynqmp-zcu102.c index 0410caa8c..842eafdfa 100644 --- a/configs/arm64/zynqmp-zcu102.c +++ b/configs/arm64/zynqmp-zcu102.c @@ -45,6 +45,7 @@ struct { .pci_mmconfig_base = 0xfc000000, .pci_mmconfig_end_bus = 0, .pci_is_virtual = 1, + .pci_domain = -1, .arm = { .gic_version = 2, .gicd_base = 0xf9010000, diff --git a/include/jailhouse/cell-config.h b/include/jailhouse/cell-config.h index 1d0ae2e59..ec8884af0 100644 --- a/include/jailhouse/cell-config.h +++ b/include/jailhouse/cell-config.h @@ -43,7 +43,7 @@ * Incremented on any layout or semantic change of system or cell config. * Also update HEADER_REVISION in tools. */ -#define JAILHOUSE_CONFIG_REVISION 8 +#define JAILHOUSE_CONFIG_REVISION 9 #define JAILHOUSE_CELL_NAME_MAXLEN 31 @@ -240,6 +240,7 @@ struct jailhouse_system { __u64 pci_mmconfig_base; __u8 pci_mmconfig_end_bus; __u8 pci_is_virtual; + __u16 pci_domain; union { struct { __u16 pm_timer_address; diff --git a/tools/jailhouse-cell-linux b/tools/jailhouse-cell-linux index 913b5dbc9..39893fa87 100755 --- a/tools/jailhouse-cell-linux +++ b/tools/jailhouse-cell-linux @@ -566,7 +566,7 @@ class Irqchip: class Config: _HEADER_FORMAT = '6sH32s4xIIIIIIIIIQ8x' - _HEADER_REVISION = 8 + _HEADER_REVISION = 9 def __init__(self, config_file): self.data = config_file.read() diff --git a/tools/jailhouse-hardware-check b/tools/jailhouse-hardware-check index 2e3b818fe..0ed119b34 100755 --- a/tools/jailhouse-hardware-check +++ b/tools/jailhouse-hardware-check @@ -109,11 +109,12 @@ class Sysconfig: MMCFGBASE_SIZE = 8 MMCFGENDBUS_SIZE = 1 PCIISVIRT_SIZE = 1 + PCIDOMAIN_SIZE = 2 X86_PADDING = 18 X86_MAX_IOMMU_UNITS = 8 X86_IOMMU_SIZE = 20 - HEADER_REVISION = 8 + HEADER_REVISION = 9 HEADER_FORMAT = '6sH' def __init__(self, path): @@ -132,7 +133,7 @@ class Sysconfig: Sysconfig.HEADER_REVISION_SIZE + Sysconfig.HVMEM_SIZE + Sysconfig.DBGCON_SIZE + Sysconfig.MMCFGBASE_SIZE + Sysconfig.MMCFGENDBUS_SIZE + Sysconfig.PCIISVIRT_SIZE + - Sysconfig.X86_PADDING) + Sysconfig.PCIDOMAIN_SIZE + Sysconfig.X86_PADDING) keys = 'base size amd_bdf amd_base_cap amd_features' IOMMU = collections.namedtuple('IOMMU', keys) -- 2.13.6 -- You received this message because you are subscribed to the Google Groups "Jailhouse" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. For more options, visit https://groups.google.com/d/optout.
