Branch: refs/heads/next
  Home:   https://github.com/siemens/jailhouse
  Commit: 53653d76496cac8696c08610d672f93323087999
      
https://github.com/siemens/jailhouse/commit/53653d76496cac8696c08610d672f93323087999
  Author: Jan Kiszka <[email protected]>
  Date:   2018-04-27 (Fri, 27 Apr 2018)

  Changed paths:
    M hypervisor/arch/x86/Kbuild
    A hypervisor/arch/x86/test-device.c
    M include/jailhouse/cell-config.h

  Log Message:
  -----------
  x86: Add MMIO access test device

On x86, we unfortunately need to parse the guest instruction that
triggered an MMIO access interception. This parser started to be small
and simple - and then real life bit. It already passed the point where
we should have added systematic tests.

This is the hypervisor-located building block for such tests. The test
creates a MMIO target page right after the Communication Page. Write
accesses to the virtual registers 0xff8..0xfff are stored per cell, read
accesses reproduce that written value. The virtual registers are backed
by the Communication Page of the same cell at the same address, thus
create a second channel to validate accesses.

This test device is optional, configured in during build time by setting
CONFIG_TEST_DEVICE in config.h and during runtime by adding
JAILHOUSE_CELL_TEST_DEVICE to the cell's config flags.

Signed-off-by: Jan Kiszka <[email protected]>


  Commit: 323eb23a4a40cc3664335820e550f0e63d4dcca5
      
https://github.com/siemens/jailhouse/commit/323eb23a4a40cc3664335820e550f0e63d4dcca5
  Author: Jan Kiszka <[email protected]>
  Date:   2018-04-27 (Fri, 27 Apr 2018)

  Changed paths:
    M configs/x86/tiny-demo.c
    M inmates/Makefile
    A inmates/tests/arm/Makefile
    A inmates/tests/arm64/Makefile
    A inmates/tests/x86/Makefile
    A inmates/tests/x86/mmio-access.c

  Log Message:
  -----------
  inmates: x86: Add test case for MMIO accessing instructions

This lays the ground for systematic tests of the MMIO instruction parser
in x86. The test-case inmate uses the new MMIO access test device for
writing and reading with yet a small number of instructions variants.
This is supposed to expanded later on with further patterns - but it
already revealed several bugs in the handling of immediate writes.

Signed-off-by: Jan Kiszka <[email protected]>


  Commit: 6a43c6de6249a67e24ffe17cf475edd0dca648fe
      
https://github.com/siemens/jailhouse/commit/6a43c6de6249a67e24ffe17cf475edd0dca648fe
  Author: Jan Kiszka <[email protected]>
  Date:   2018-04-27 (Fri, 27 Apr 2018)

  Changed paths:
    M hypervisor/arch/x86/mmio.c

  Log Message:
  -----------
  x86: mmio: Fix instruction length calculation for write-immediate

This fixes one case around mov imm,<addr>: We read the immediate value
to be written, but we forgot to update inst_len. This fixes that issue
by moving the update from ctx.count to inst.inst_len to the very end
of the parser.

Fixes: 95202a038b9e ("x86,mmio: Add support for 1 more instructions on
                the MMIO dispatcher")
Signed-off-by: Jan Kiszka <[email protected]>


  Commit: 95814f73b5bc6f4747ad8ae61d61c213896b9324
      
https://github.com/siemens/jailhouse/commit/95814f73b5bc6f4747ad8ae61d61c213896b9324
  Author: Jan Kiszka <[email protected]>
  Date:   2018-04-27 (Fri, 27 Apr 2018)

  Changed paths:
    M hypervisor/arch/x86/mmio.c

  Log Message:
  -----------
  x86: mmio: Fix handling of displacement bytes when writing immediates

We only skipped over 32-bit displacements in mod 0 so far. But mod 1 and
2 can bring them as well. Moreover, we incremented inst_len even when
skipping via ctx_update, which accounted the displacement twice.

Fix this by pulling out the displacement skip, moving it before the
immediate retrieval. If there is no immediate to read, directly add the
displacement length to inst_len.

Fixes: 95202a038b9e ("x86,mmio: Add support for 1 more instructions on
                the MMIO dispatcher")
Signed-off-by: Jan Kiszka <[email protected]>


  Commit: c9690d988016492d5a32e066a45207edcfd584c2
      
https://github.com/siemens/jailhouse/commit/c9690d988016492d5a32e066a45207edcfd584c2
  Author: Jan Kiszka <[email protected]>
  Date:   2018-04-27 (Fri, 27 Apr 2018)

  Changed paths:
    M hypervisor/arch/x86/mmio.c

  Log Message:
  -----------
  x86: mmio: Reliably identify mov immediate instructions

The opcode of mov imm,<mem> also consists of reg=0 in the ModR/M byte.
Make sure that we do not misinterpret an instruction.

Fixes: 95202a038b9e ("x86,mmio: Add support for 1 more instructions on
                the MMIO dispatcher")
Signed-off-by: Jan Kiszka <[email protected]>


  Commit: 24d326c4c1b88cce21980bed68abe3b958248424
      
https://github.com/siemens/jailhouse/commit/24d326c4c1b88cce21980bed68abe3b958248424
  Author: Jan Kiszka <[email protected]>
  Date:   2018-04-27 (Fri, 27 Apr 2018)

  Changed paths:
    M hypervisor/arch/x86/mmio.c

  Log Message:
  -----------
  x86: mmio: Sign-extend immediate of 64-bit mov

The immediate value of mov imm,<mem> is still 32-bit in case of a 64-bit
write, but it has to be sign-extended in that case. Add the missing
logic.

Fixes: 95202a038b9e ("x86,mmio: Add support for 1 more instructions on
                the MMIO dispatcher")
Signed-off-by: Jan Kiszka <[email protected]>


  Commit: b8cf6db573d88b83233850bd6c45f2503a7d878b
      
https://github.com/siemens/jailhouse/commit/b8cf6db573d88b83233850bd6c45f2503a7d878b
  Author: Jan Kiszka <[email protected]>
  Date:   2018-04-27 (Fri, 27 Apr 2018)

  Changed paths:
    M hypervisor/arch/x86/mmio.c

  Log Message:
  -----------
  x86: mmio: Complete SIB + displacement support

The case of mod=1 or 2 and rm = 4 (SIB) is easy to handle because we do
not need to evaluate the SIB byte and can simply skip over it.

Signed-off-by: Jan Kiszka <[email protected]>


  Commit: 262a692efe0446fc4baf5ece359d3716fcc72465
      
https://github.com/siemens/jailhouse/commit/262a692efe0446fc4baf5ece359d3716fcc72465
  Author: Jan Kiszka <[email protected]>
  Date:   2018-04-27 (Fri, 27 Apr 2018)

  Changed paths:
    M hypervisor/arch/x86/mmio.c

  Log Message:
  -----------
  x86: mmio: Refactor code for mod=0 handling

This just improves readability and makes the code more compact. The
rm cases are now dispatched in ascending order.

Signed-off-by: Jan Kiszka <[email protected]>


  Commit: 02a85010cc4dff2a7021a6c199a6123f104fc7b6
      
https://github.com/siemens/jailhouse/commit/02a85010cc4dff2a7021a6c199a6123f104fc7b6
  Author: Jan Kiszka <[email protected]>
  Date:   2018-04-27 (Fri, 27 Apr 2018)

  Changed paths:
    M hypervisor/arch/x86/apic.c
    M hypervisor/arch/x86/include/asm/apic.h
    M hypervisor/arch/x86/include/asm/mmio.h
    M hypervisor/arch/x86/include/asm/vcpu.h
    M hypervisor/arch/x86/mmio.c
    M hypervisor/arch/x86/svm.c
    M hypervisor/arch/x86/vcpu.c
    M hypervisor/arch/x86/vmx.c

  Log Message:
  -----------
  x86: Split up vcpu_vendor_get_execution_state

Rather than always pulling the four fields of vcpu_execution_state at
once, introduce individual accessor functions. This allows to reduce the
number of expensive vmcs_read operations on Intel to 2 for typical
hypercalls and all MMIO interceptions.

Signed-off-by: Jan Kiszka <[email protected]>


  Commit: 0699a2569af23768480bc8b1ef0350fecf8a0038
      
https://github.com/siemens/jailhouse/commit/0699a2569af23768480bc8b1ef0350fecf8a0038
  Author: Jan Kiszka <[email protected]>
  Date:   2018-04-27 (Fri, 27 Apr 2018)

  Changed paths:
    M hypervisor/arch/x86/mmio.c

  Log Message:
  -----------
  x86: mmio: Fix parsing for mov ax to/from mem in 64-bit mode

In long mode, we have 64-bit addresses by default, and so we need to
skip over 8 bytes of address for that instruction.

Fixes: ea43ce86f4e3 ("x86,mmio: Add support for 2 more instructions on
                the MMIO dispatcher")
Signed-off-by: Jan Kiszka <[email protected]>


  Commit: 31d19ffc0027ef30e84ab4f1adcfb4720926988c
      
https://github.com/siemens/jailhouse/commit/31d19ffc0027ef30e84ab4f1adcfb4720926988c
  Author: Jan Kiszka <[email protected]>
  Date:   2018-04-27 (Fri, 27 Apr 2018)

  Changed paths:
    M hypervisor/arch/x86/mmio.c

  Log Message:
  -----------
  x86: Remove misleading brackets from mmio instruction dump

The parser my bail out on opcode byte 0-2.

Signed-off-by: Jan Kiszka <[email protected]>


  Commit: 89061a400f816d627068073a135f9d3a70d4c9b4
      
https://github.com/siemens/jailhouse/commit/89061a400f816d627068073a135f9d3a70d4c9b4
  Author: Ralf Ramsauer <[email protected]>
  Date:   2018-04-27 (Fri, 27 Apr 2018)

  Changed paths:
    M hypervisor/setup.c

  Log Message:
  -----------
  core: amend misleading comment in entry()

The arch independent entry() routine isn't called directly by the kernel
driver, it's rather called by the arch_entry assembler stubs after
setting up the environment.

The current comment might be a bit misleading.

Signed-off-by: Ralf Ramsauer <[email protected]>
Signed-off-by: Jan Kiszka <[email protected]>


  Commit: df648e0c063008c857309026a4984401292e24c2
      
https://github.com/siemens/jailhouse/commit/df648e0c063008c857309026a4984401292e24c2
  Author: Jan Kiszka <[email protected]>
  Date:   2018-04-27 (Fri, 27 Apr 2018)

  Changed paths:
    M hypervisor/control.c

  Log Message:
  -----------
  core: Instrument failing DEBUG_CONSOLE_PUTC hypercall

If the guest doesn't print anything on the debug console although it
should and you are sure you did everything right, just enable
CONFIG_TRACE_ERROR, and the hypervisor may now tell you (indirectly)
that you forgot to configure this logging privilege in the cell config.

Reported-by: Francois-Frederic Ozog <[email protected]>
Signed-off-by: Jan Kiszka <[email protected]>


  Commit: 6f589557d606519746c88f2fd70172eec27ffec7
      
https://github.com/siemens/jailhouse/commit/6f589557d606519746c88f2fd70172eec27ffec7
  Author: Jan Kiszka <[email protected]>
  Date:   2018-04-27 (Fri, 27 Apr 2018)

  Changed paths:
    M configs/Makefile
    M hypervisor/Makefile
    M inmates/Makefile
    M tools/Makefile

  Log Message:
  -----------
  build: Avoid evaluating linux/compiler_types.h

Since 4.17, kbuild pulls in linux/compiler_types.h via -include in a way
we cannot avoid as long as we are using kbuild. This is not only against
our intention to avoid kernel headers for everything but the driver
module, it also breaks the build as we do not provide a search path for
the headers that compiler_types.h includes itself.

Fortunately, we can avoid the evaluation of that header simply by
defining its include guard.

Signed-off-by: Jan Kiszka <[email protected]>


  Commit: 773a80800991688db74c130782da870d46f66979
      
https://github.com/siemens/jailhouse/commit/773a80800991688db74c130782da870d46f66979
  Author: Jan Kiszka <[email protected]>
  Date:   2018-04-27 (Fri, 27 Apr 2018)

  Changed paths:
    M driver/pci.c

  Log Message:
  -----------
  driver: Use pci_get_domain_bus_and_slot

pci_get_bus_and_slot was removed in 4.17 while the more powerful
alternative exists since 2.6 times.

Signed-off-by: Jan Kiszka <[email protected]>


  Commit: 6e35d3e82a995802eae49dc3bf9f3122a2272815
      
https://github.com/siemens/jailhouse/commit/6e35d3e82a995802eae49dc3bf9f3122a2272815
  Author: Jan Kiszka <[email protected]>
  Date:   2018-04-27 (Fri, 27 Apr 2018)

  Changed paths:
    M hypervisor/Makefile
    M hypervisor/arch/arm/Kbuild
    M hypervisor/arch/arm64/Kbuild
    M hypervisor/arch/x86/Kbuild

  Log Message:
  -----------
  build: Switch to lib.a for architecture parts of hypervisor

We already use this pattern for the inmate library. Moreover, our
current pattern of generating build-in.o no longer works with 4.17.
Switching to a library build is straightforward for arm and arm64, we
just need more explicit rules on x86 because of the need to build two
libraries in the same folder which is not directly supported by kbuild.

Signed-off-by: Jan Kiszka <[email protected]>


  Commit: f42bb50414f509ab78130a1980dcc832025eb81b
      
https://github.com/siemens/jailhouse/commit/f42bb50414f509ab78130a1980dcc832025eb81b
  Author: Jan Kiszka <[email protected]>
  Date:   2018-04-27 (Fri, 27 Apr 2018)

  Changed paths:
    M configs/arm/dts/inmate-bananapi.dts
    M configs/arm/dts/inmate-jetson-tk1.dts
    M configs/arm/dts/inmate-orangepi0.dts
    M configs/arm64/dts/inmate-espressobin.dts
    M configs/arm64/dts/inmate-hikey.dts
    M configs/arm64/dts/inmate-jetson-tx1.dts
    M configs/arm64/dts/inmate-qemu-arm64.dts
    M configs/arm64/dts/inmate-zynqmp-zcu102-2.dts
    M configs/arm64/dts/inmate-zynqmp-zcu102.dts
    M driver/pci.c
    M driver/vpci_template.dts

  Log Message:
  -----------
  configs, driver: Rename virtual PCI DT entries to "pci"

The dtc of 4.17+ checks if a device tree node of device_type "pci" is
also called "pci". Please it by renaming ours.

Signed-off-by: Jan Kiszka <[email protected]>


  Commit: ee6caf0ba6de6aa118ba09c8c6a96e6732be6674
      
https://github.com/siemens/jailhouse/commit/ee6caf0ba6de6aa118ba09c8c6a96e6732be6674
  Author: Jan Kiszka <[email protected]>
  Date:   2018-04-27 (Fri, 27 Apr 2018)

  Changed paths:
    M driver/pci.c
    M driver/vpci_template.dts

  Log Message:
  -----------
  driver: Rework vpci overlay management for 4.17 - and before

As the API of 4.17 changes, replacing of_fdt_unflatten_tree +
of_overlay_apply with just of_overlay_fdt_apply, we have to adjust our
vpci overlay management. We now register the incomplete template, but in
a disabled state. Then we apply the required changes on the live tree,
including the activation of the node. This pattern nicely works for both
newer and older kernels.

Along this, we fix our lifecycle management of the the changeset as well
as its registered properties. The old code pushed in static properties,
but the OF core was implicitly expecting dynamically allocated objects.
Probably only due to resource leakage issues, we so far didn't trigger
any lethal attempt to kfree stack objects.

The new code has been validated extensively via kmemleak and kasan. Note
that, at the time of writing, the of_overlay_fdt_apply has a built-in
resource leakage that we cannot fix from this code. A solutions are
being discussed upstream.

Signed-off-by: Jan Kiszka <[email protected]>


  Commit: ee38448bd8c60854148ba7c5e33d047f871a7d0e
      
https://github.com/siemens/jailhouse/commit/ee38448bd8c60854148ba7c5e33d047f871a7d0e
  Author: Jan Kiszka <[email protected]>
  Date:   2018-04-27 (Fri, 27 Apr 2018)

  Changed paths:
    M configs/arm/jetson-tk1.c
    M configs/arm64/espressobin.c
    M configs/arm64/hikey.c
    M configs/arm64/jetson-tx1.c
    M configs/arm64/qemu-arm64.c
    M configs/arm64/zynqmp-zcu102.c
    M include/jailhouse/cell-config.h
    M tools/jailhouse-cell-linux
    M tools/jailhouse-hardware-check

  Log Message:
  -----------
  config: Add PCI domain number field to platform parameters

This encodes the domain number the virtual PCI host controller should
use. 0..0xfffe are explicitly assigned numbers, 0xffff (-1) is used to
encode the previous semantic: the guest assigns the number itself.

Set all configs with active virtual PCI controllers and known existence
of real PCI hosts to -1 in order to preserve the current behavior.

Signed-off-by: Jan Kiszka <[email protected]>


  Commit: 013f060d372426875e93a22df9a69e95dc6beed0
      
https://github.com/siemens/jailhouse/commit/013f060d372426875e93a22df9a69e95dc6beed0
  Author: Jan Kiszka <[email protected]>
  Date:   2018-04-27 (Fri, 27 Apr 2018)

  Changed paths:
    M driver/pci.c

  Log Message:
  -----------
  driver: Add linux,pci-domain property to DT overlay

If the system config contains a pci_domain value in the range 0..0xfffe,
expose this value via the linux,pci-domain property to the guest so that
the virtual controller will get a fixed domain number.

Signed-off-by: Jan Kiszka <[email protected]>


  Commit: c11d1e5d320d5231f57c7a87c289273c5d867602
      
https://github.com/siemens/jailhouse/commit/c11d1e5d320d5231f57c7a87c289273c5d867602
  Author: Jan Kiszka <[email protected]>
  Date:   2018-04-27 (Fri, 27 Apr 2018)

  Changed paths:
    M configs/arm/jetson-tk1.c
    M configs/arm64/espressobin.c
    M configs/arm64/hikey.c
    M configs/arm64/jetson-tx1.c
    M configs/arm64/qemu-arm64.c
    M configs/arm64/zynqmp-zcu102.c

  Log Message:
  -----------
  configs: Adjust domains of virtual PCI controllers

We usually expect our virtual PCI controller to take domain 1 on
platforms that already have physical (but unvirtualizable) PCI host. If
we leave the domain at 0, we may accidentally unplug a real device from
the real host on shutdown. And if the virtual bridge should actually be
at domain 0, we will still unplug the device when we remove its host
controller's device tree overlay fragment.

Signed-off-by: Jan Kiszka <[email protected]>


  Commit: bbdb3c6620ac8055b42740266ed6c3cae773021f
      
https://github.com/siemens/jailhouse/commit/bbdb3c6620ac8055b42740266ed6c3cae773021f
  Author: Ralf Ramsauer <[email protected]>
  Date:   2018-04-27 (Fri, 27 Apr 2018)

  Changed paths:
    M hypervisor/arch/x86/include/asm/percpu.h

  Log Message:
  -----------
  core: x86: percpu: remove superfluous include

This include is not required.

Signed-off-by: Ralf Ramsauer <[email protected]>
Signed-off-by: Jan Kiszka <[email protected]>


Compare: 
https://github.com/siemens/jailhouse/compare/e22a8aacd7b7...bbdb3c6620ac

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