On 2018-05-03 17:03, Henning Schild wrote:
> The prefix does appear in guests compiled with "-mx32". In the
> instruction parser we just have to skip over it.
> The patch also adds a few of these instructions to the mmio testcase.
> 
> Reported-by: Rene Graf <[email protected]>
> Signed-off-by: Henning Schild <[email protected]>
> ---
>  hypervisor/arch/x86/include/asm/processor.h |  2 ++
>  hypervisor/arch/x86/mmio.c                  | 10 ++++--
>  inmates/tests/x86/mmio-access.c             | 47 
> +++++++++++++++++++++++++++++
>  3 files changed, 57 insertions(+), 2 deletions(-)
> 
> diff --git a/hypervisor/arch/x86/include/asm/processor.h 
> b/hypervisor/arch/x86/include/asm/processor.h
> index df94fc77..eb65c307 100644
> --- a/hypervisor/arch/x86/include/asm/processor.h
> +++ b/hypervisor/arch/x86/include/asm/processor.h
> @@ -143,6 +143,8 @@
>  
>  #define X86_REX_CODE                                 4
>  
> +#define X86_PREFIX_ADDR_SZ                           0x67
> +
>  #define X86_OP_MOVZX_OPC1                            0x0f
>  #define X86_OP_MOVZX_OPC2_B                          0xb6
>  #define X86_OP_MOVZX_OPC2_W                          0xb7
> diff --git a/hypervisor/arch/x86/mmio.c b/hypervisor/arch/x86/mmio.c
> index 775ec4b7..3fa73212 100644
> --- a/hypervisor/arch/x86/mmio.c
> +++ b/hypervisor/arch/x86/mmio.c
> @@ -84,6 +84,7 @@ x86_mmio_parse(const struct guest_paging_structures 
> *pg_structs, bool is_write)
>       bool does_write = false;
>       bool has_rex_w = false;
>       bool has_rex_r = false;
> +     bool has_addrsz_prefix = false;
>  
>       if (!ctx_update(&ctx, &pc, 0, pg_structs))
>               goto error_noinst;
> @@ -103,6 +104,11 @@ restart:
>               goto restart;
>       }
>       switch (op[0].raw) {
> +     case X86_PREFIX_ADDR_SZ:
> +             if (!ctx_update(&ctx, &pc, 1, pg_structs))
> +                     goto error_noinst;
> +             has_addrsz_prefix = true;
> +             goto restart;
>       case X86_OP_MOVZX_OPC1:
>               if (!ctx_update(&ctx, &pc, 1, pg_structs))
>                       goto error_noinst;
> @@ -131,12 +137,12 @@ restart:
>               does_write = true;
>               break;
>       case X86_OP_MOV_MEM_TO_AX:
> -             inst.inst_len += addr64 ? 8 : 4;
> +             inst.inst_len += (addr64 ^ has_addrsz_prefix) ? 8 : 4;
>               inst.access_size = has_rex_w ? 8 : 4;
>               inst.in_reg_num = 15;
>               goto final;
>       case X86_OP_MOV_AX_TO_MEM:
> -             inst.inst_len += addr64 ? 8 : 4;
> +             inst.inst_len += (addr64 ^ has_addrsz_prefix) ? 8 : 4;
>               inst.access_size = has_rex_w ? 8 : 4;
>               inst.out_val = guest_regs->by_index[15];
>               does_write = true;
> diff --git a/inmates/tests/x86/mmio-access.c b/inmates/tests/x86/mmio-access.c
> index b148dc17..90707f8a 100644
> --- a/inmates/tests/x86/mmio-access.c
> +++ b/inmates/tests/x86/mmio-access.c
> @@ -51,11 +51,21 @@ void inmate_main(void)
>               : "=a" (reg64) : "a" (0), "b" (mmio_reg));
>       EXPECT_EQUAL(reg64, (u32)pattern);
>  
> +     /* MOV_FROM_MEM (8b), 32-bit data, 32-bit address */
> +     asm volatile("movl (%%ebx), %%eax"
> +             : "=a" (reg64) : "a" (0), "b" (mmio_reg));
> +     EXPECT_EQUAL((u32)reg64, (u32)pattern);
> +
>       /* MOVZXB (0f b6), to 64-bit, mod=0, reg=0, rm=3 */
>       asm volatile("movzxb (%%rbx), %%rax"
>               : "=a" (reg64) : "a" (0), "b" (mmio_reg));
>       EXPECT_EQUAL(reg64, (u8)pattern);
>  
> +     /* MOVZXB (0f b6), 32-bit data, 32-bit address */
> +     asm volatile("movzxb (%%ebx), %%eax"
> +             : "=a" (reg64) : "a" (0), "b" (mmio_reg));
> +     EXPECT_EQUAL(reg64, (u8)pattern);
> +
>       /* MOVZXW (0f b7) */
>       asm volatile("movzxw (%%rbx), %%rax"
>               : "=a" (reg64) : "a" (0), "b" (mmio_reg));
> @@ -71,6 +81,12 @@ void inmate_main(void)
>               : "=a" (reg64) : "a" (0));
>       EXPECT_EQUAL(reg64, (u32)pattern);
>  
> +     reg64 = 0ULL;
> +     /* MEM_TO_AX (a1), 32-bit data, 32-bit address */
> +     asm volatile(".byte 0x67, 0x48, 0xa1, 0xf8, 0x1f, 0x10, 0x00"
> +             : "=a" (reg64) : "a" (0));
> +     EXPECT_EQUAL((u32)reg64, (u32)pattern);
> +
>       printk("MMIO read test %s\n\n", all_passed ? "passed" : "FAILED");
>  
>       /* --- Write Tests --- */
> @@ -107,17 +123,36 @@ void inmate_main(void)
>               : : "i" (0xccddeeff), "b" (mmio_reg));
>       EXPECT_EQUAL(*comm_page_reg, 0x11223344ccddeeff);
>  
> +     mmio_write64(mmio_reg, 0x1122334455667788);
> +     /* IMMEDIATE_TO_MEM (c7), 32-bit data, 32-bit address */
> +     asm volatile("movl %0, (%%ebx)"
> +             : : "i" (0xccddeeff), "b" (mmio_reg));
> +     EXPECT_EQUAL(*comm_page_reg, 0x11223344ccddeeff);
> +
>       mmio_write64(mmio_reg, 0x1122334455667788);
>       /* IMMEDIATE_TO_MEM (c7), 32-bit data, mod=1 (disp8), reg=0, rm=3 */
>       asm volatile("movl %0, 0x10(%%rbx)"
>               : : "i" (0xccddeeff), "b" (mmio_reg - 0x10));
>       EXPECT_EQUAL(*comm_page_reg, 0x11223344ccddeeff);
>  
> +     mmio_write64(mmio_reg, 0x1122334455667788);
> +     /* IMMEDIATE_TO_MEM (c7), 32-bit data, 32-bit address */
> +     asm volatile("movl %0, 0x10(%%ebx)"
> +             : : "i" (0xccddeeff), "b" (mmio_reg - 0x10));
> +     EXPECT_EQUAL(*comm_page_reg, 0x11223344ccddeeff);
> +
> +     mmio_write64(mmio_reg, 0x1122334455667788);
>       /* IMMEDIATE_TO_MEM (c7), 32-bit data, mod=2 (disp32), reg=0, rm=3 */
>       asm volatile("movl %0, 0x10000000(%%rbx)"
>               : : "i" (0xccddeeff), "b" (mmio_reg - 0x10000000));
>       EXPECT_EQUAL(*comm_page_reg, 0x11223344ccddeeff);
>  
> +     mmio_write64(mmio_reg, 0x1122334455667788);
> +     /* IMMEDIATE_TO_MEM (c7), 32-bit data, 32-bit address */
> +     asm volatile("movl %0, 0x10000000(%%ebx)"
> +             : : "i" (0xccddeeff), "b" (mmio_reg - 0x10000000));
> +     EXPECT_EQUAL(*comm_page_reg, 0x11223344ccddeeff);
> +
>       /* MOVB_TO_MEM (88), mod=0, reg=0, rm=3 */
>       asm volatile("mov %%al, (%%rbx)"
>               : : "a" (0x99), "b" (mmio_reg));
> @@ -133,6 +168,12 @@ void inmate_main(void)
>               : : "a" (0x12345678), "b" (mmio_reg - 0x10000000));
>       EXPECT_EQUAL(*comm_page_reg, 0x12345678);
>  
> +     mmio_write64(mmio_reg, 0x1122334455667788);
> +     /* MOV_TO_MEM (89), 64-bit data, 32-bit address */
> +     asm volatile("movq %%rax, 0x10000000(%%ebx)"
> +             : : "a" (0x8765432112345678), "b" (mmio_reg - 0x10000000));
> +     EXPECT_EQUAL(*comm_page_reg, 0x8765432112345678);
> +
>       /* MOV_TO_MEM (89), 64-bit data, mod=0, reg=0, rm=4 (SIB) */
>       asm volatile("movq %%rax, (%%rbx,%%rcx)"
>               : : "a" (0x12345678), "b" (mmio_reg), "c" (0));
> @@ -143,5 +184,11 @@ void inmate_main(void)
>               : : "a" (0x12345678), "b" (mmio_reg - 0x10000000), "c" (0));
>       EXPECT_EQUAL(*comm_page_reg, 0x12345678);
>  
> +     pattern = 0xdeadbeef;
> +     /* AX_TO_MEM (a3), 32-bit data, 32-bit address */
> +     asm volatile(".byte 0x67, 0x48, 0xa3, 0xf8, 0x1f, 0x10, 0x00"
> +             : : "a" (pattern));
> +     EXPECT_EQUAL(mmio_read32(mmio_reg), (u32)pattern);
> +
>       printk("MMIO write test %s\n", all_passed ? "passed" : "FAILED");
>  }
> 

Thanks, applied to next.

Jan

-- 
Siemens AG, Corporate Technology, CT RDA IOT SES-DE
Corporate Competence Center Embedded Linux

-- 
You received this message because you are subscribed to the Google Groups 
"Jailhouse" group.
To unsubscribe from this group and stop receiving emails from it, send an email 
to [email protected].
For more options, visit https://groups.google.com/d/optout.

Reply via email to