Hi Jan,
After setting
num_msix_vectors = 0
in the root cell and inmate cell configuration I get good output when starting
up the inmate cell:
Initializing Jailhouse hypervisor v0.7 (220-g2ad429b) on CPU 0
Code location: 0xf0000040
Page pool usage after early setup: mem 30/4072, remap 32/131072
Initializing processors:
CPU 0... OK
CPU 1... OK
Adding virtual PCI device 00:00.0 to cell "AM57XX-EVM"
Page pool usage after late setup: mem 43/4072, remap 38/131072
Activating hypervisor
[ 83.501224] OF: PCI: host bridge /vpci@0 ranges:
[ 83.505887] OF: PCI: MEM 0x30100000..0x30101fff -> 0x30100000
[ 83.514707] pci-host-generic 30000000.vpci: ECAM at [mem
0x30000000-0x300fffff] for [bus 00]
[ 83.526709] pci-host-generic 30000000.vpci: PCI host bridge to bus 0001:00
[ 83.535943] pci_bus 0001:00: root bus resource [bus 00]
[ 83.543374] pci_bus 0001:00: root bus resource [mem 0x30100000-0x30101fff]
[ 83.552696] PCI: bus0: Fast back to back transfers disabled
[ 83.563731] pci 0001:00:00.0: BAR 0: assigned [mem 0x30100000-0x301000ff
64bit]
[ 83.573755] virtio-pci 0001:00:00.0: enabling device (0000 -> 0002)
[ 83.583232] uio_ivshmem 0001:00:00.0: using jailhouse mode
[ 83.591699] The Jailhouse is opening.
Adding virtual PCI device 00:00.0 to cell "AM572X-IDK-ICSS"
Shared memory connection established: "AM572X-IDK-ICSS" <--> "AM57XX-EVM"
Created cell "AM572X-IDK-ICSS"
Page pool usage after cell creation: mem 63/4072, remap 38/131072
[ 84.210960] Created Jailhouse cell "AM572X-IDK-ICSS"
root@am57xx-evm:~# lspci -v
...
0001:00:00.0 Unassigned class [ff00]: Red Hat, Inc Inter-VM shared memory
Subsystem: Red Hat, Inc Inter-VM shared memory
Flags: bus master, fast devsel, latency 0, IRQ 180
Memory at 30100000 (64-bit, non-prefetchable) [size=256]
Kernel driver in use: uio_ivshmem
root@am57xx-evm:~# cat /proc/interrupts
CPU0
17: 0 CBAR 32 Level gp_timer
18: 0 GICv2 29 Level arch_timer
...
180: 0 GICv2 32 Edge uio_ivshmem
...
Though I couldn't fire the interrupt from any cell.
>From the linux root cell I tried mmaping 0x30100000, then writing 1 to the
>mapped address+3.
I also tried using henning-schild-work/ivshmem-guest-code send_uio to address
/dev/uio0 with no success.
root@am57xx-evm:~# ./uio_send /dev/uio0 1 1 0
[UIO] opening file /dev/uio0
[UIO] count is 1
[UIO] writing 1
[UIO] ping #0
[UIO] Exiting...
root@am57xx-evm:~#
>From the RTOS inmate I tried writing 1 to 0x3010000c, which seems to get the
>cell stuck without any
error message from the hypervisor.
The current cell configurations are attached.
Thanks a lot,
Nir.
--
You received this message because you are subscribed to the Google Groups
"Jailhouse" group.
To unsubscribe from this group and stop receiving emails from it, send an email
to [email protected].
For more options, visit https://groups.google.com/d/optout.
/*
* Jailhouse, a Linux-based partitioning hypervisor
*
* Configuration for uart-demo inmate on AM57XX-EVM:
*
* Copyright (c) Texas Instruments, Inc.
*
* Authors:
* Vitaly Andrianiov <[email protected]>
*
* This work is licensed under the terms of the GNU GPL, version 2. See
* the COPYING file in the top-level directory.
*/
#include <jailhouse/types.h>
#include <jailhouse/cell-config.h>
#define ARRAY_SIZE(a) sizeof(a) / sizeof(a[0])
struct {
struct jailhouse_cell_desc cell;
__u64 cpus[1];
struct jailhouse_memory mem_regions[9];
struct jailhouse_irqchip irqchips[1];
struct jailhouse_pci_device pci_devices[1];
} __attribute__((packed)) config = {
.cell = {
.signature = JAILHOUSE_CELL_DESC_SIGNATURE,
.revision = JAILHOUSE_CONFIG_REVISION,
.name = "AM572X-IDK-ICSS",
.flags = JAILHOUSE_CELL_PASSIVE_COMMREG,
.num_irqchips = 1,
.cpu_set_size = sizeof(config.cpus),
.num_memory_regions = ARRAY_SIZE(config.mem_regions),
.num_pci_devices = ARRAY_SIZE(config.pci_devices),
/*.vpci_irq_base = 96,*/
},
.cpus = {
0x2,
},
.mem_regions = {
/* OCRAM buffer area */ {
.phys_start = 0x40340000,
.virt_start = 0x40340000,
.size = 0xC0000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO | JAILHOUSE_MEM_ROOTSHARED,
},
/* UART... */ {
.phys_start = 0x48020000,
.virt_start = 0x48020000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO | JAILHOUSE_MEM_ROOTSHARED,
},
/* ... */ {
.phys_start = 0x48050000,
.virt_start = 0x48050000,
.size = 0x10000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO | JAILHOUSE_MEM_ROOTSHARED,
},
{
/* TIMER8 */
.phys_start = 0x48826000,
.virt_start = 0x48826000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO | JAILHOUSE_MEM_ROOTSHARED,
},
/* L4_CFG */ {
.phys_start = 0x4a000000,
.virt_start = 0x4a000000,
.size = 0xE10000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO | JAILHOUSE_MEM_ROOTSHARED,
},
/* PRUSS */ {
.phys_start = 0x4b200000,
.virt_start = 0x4b200000,
.size = 0x100000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO | JAILHOUSE_MEM_ROOTSHARED,
},
/* RAM loader */ {
.phys_start = 0xed000000,
.virt_start = 0x0,
.size = 0x10000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE,
},
/* RAM RTOS 224MB*/ {
.phys_start = 0xe0000000,
.virt_start = 0x80000000,
.size = 0xd000000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE,
},
/* IVSHMEM shared memory region for 02:00.0 */ {
.phys_start = 0xEEE00000,
.virt_start = 0xEEE00000,
.size = 0x100000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_ROOTSHARED,
},
},
.irqchips = {
/* GIC */ {
.address = 0x48211000,
.pin_base = 64,
.pin_bitmap = {
0x00001000, 0x0, 0x80000000, 0x000003C2,
},
},
},
.pci_devices = {
{ /* 02:00.0 */
.type = JAILHOUSE_PCI_TYPE_IVSHMEM,
//.iommu = 1,
.bdf = 0 << 3,
.bar_mask = {
0xffffff00, 0xffffffff, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.num_msix_vectors = 0,
.shmem_region = 8,
.shmem_protocol = JAILHOUSE_SHMEM_PROTO_UNDEFINED,
},
},
};
/*
* Jailhouse, a Linux-based partitioning hypervisor
*
* Copyright (c) Texas Insturments. Inc, 2016
*
* Authors:
* Vitaly Andrianov <[email protected]>
*
* This work is licensed under the terms of the GNU GPL, version 2. See
* the COPYING file in the top-level directory.
*/
#include <jailhouse/types.h>
#include <jailhouse/cell-config.h>
#define ARRAY_SIZE(a) sizeof(a) / sizeof(a[0])
struct {
struct jailhouse_system header;
__u64 cpus[1];
struct jailhouse_memory mem_regions[19];
struct jailhouse_irqchip irqchips[2];
struct jailhouse_pci_device pci_devices[1];
} __attribute__((packed)) config = {
.header = {
.signature = JAILHOUSE_SYSTEM_SIGNATURE,
.revision = JAILHOUSE_CONFIG_REVISION,
.hypervisor_memory = {
.phys_start = 0xef000000,
.size = 0x1000000,
},
.debug_console = {
.address = 0x48020000,
.size = 0x1000,
/* .divider = 26, */
.flags = JAILHOUSE_CON1_TYPE_8250 |
JAILHOUSE_CON1_ACCESS_MMIO |
JAILHOUSE_CON1_REGDIST_4 |
JAILHOUSE_CON2_TYPE_ROOTPAGE,
},
.platform_info = {
.pci_mmconfig_base = 0x30000000,
.pci_mmconfig_end_bus = 0,
.pci_is_virtual = 1,
.arm = {
.gic_version = 2,
.gicd_base = 0x48211000,
.gicc_base = 0x48212000,
.gich_base = 0x48214000,
.gicv_base = 0x48216000,
.maintenance_irq = 25,
},
},
.root_cell = {
.name = "AM57XX-EVM",
.cpu_set_size = sizeof(config.cpus),
.num_memory_regions = ARRAY_SIZE(config.mem_regions),
.num_irqchips = ARRAY_SIZE(config.irqchips),
.num_pci_devices = ARRAY_SIZE(config.pci_devices),
/*.vpci_irq_base = 96,*/
},
},
.cpus = {
0x3,
},
.mem_regions = {
/* PCI */ {
.phys_start = 0x20000000,
.virt_start = 0x20000000,
.size = 0x10000000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* OCMCRAM */ {
.phys_start = 0x40300000,
.virt_start = 0x40300000,
.size = 0x80000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* 0x40380000 - 0x48020000 */ {
.phys_start = 0x40380000,
.virt_start = 0x40380000,
.size = 0x7ca0000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* UART... */ {
.phys_start = 0x48020000,
.virt_start = 0x48020000,
.size = 0xe0000,//0x00001000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* 0x48100000 - 0x48281000 */ {
.phys_start = 0x48100000,
.virt_start = 0x48100000,
.size = 0x110000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/*
* Leave gap for GIC controller 0x48210000 - 0x41220000
*/
/* 0x48220000 - 0x48281000 */ {
.phys_start = 0x48220000,
.virt_start = 0x48220000,
.size = 0x610000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* OMAP WakeupGen */ {
.phys_start = 0x48281000,
.virt_start = 0x48281000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* PRCM MPU */ {
.phys_start = 0x48243000,
.virt_start = 0x48243000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* 0x48400000 - 0x48424000 */ {
.phys_start = 0x48400000,
.virt_start = 0x48400000,
.size = 0x24000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* UART... */ {
.phys_start = 0x48424000,
.virt_start = 0x48424000,
.size = 0x2000,//0x00001000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* 0x48426000 - 0x48826000 */ {
.phys_start = 0x48426000,
.virt_start = 0x48426000,
.size = 0x400000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* 0x48826000 - 0x48828000 */ {
.phys_start = 0x48826000,
.virt_start = 0x48826000,
.size = 0x2000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* 0x48828000 - 0x4B300000 */ {
.phys_start = 0x48828000,
.virt_start = 0x48828000,
.size = 0x2ad8000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* 0x4B500000 - 0x58000000 */ {
.phys_start = 0x4B500000,
.virt_start = 0x4B500000,
.size = 0xCB00000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* Display Subsystem & ...*/ {
.phys_start = 0x58000000,
.virt_start = 0x58000000,
.size = 0x8000000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* RAM */ {
.phys_start = 0x80000000,
.virt_start = 0x80000000,
.size = 0x6EE00000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE,
},
/* IVSHMEM shared memory region for 02:00.0 */ {
.phys_start = 0xEEE00000,
.virt_start = 0xEEE00000,
.size = 0x100000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_ROOTSHARED,
},
/* communication region */ {
.phys_start = 0xEEF00000,
.virt_start = 0xEEF00000,
.size = 0x00100000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* Leave hole for hypervisor */
/* RAM */ {
.phys_start = 0xF0000000,
.virt_start = 0xF0000000,
.size = 0x10000000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE,
},
},
.irqchips = {
/* GIC */ {
.address = 0x48211000,
.pin_base = 32,
.pin_bitmap = {
0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
},
},
/* GIC */ {
.address = 0x48211000,
.pin_base = 160,
.pin_bitmap = {
0xffffffff, 0, 0, 0
},
},
},
.pci_devices = {
{ /* 02:00.0 */
.type = JAILHOUSE_PCI_TYPE_IVSHMEM,
//.iommu = 1,
.bdf = 0 << 3,
.bar_mask = {
0xffffff00, 0xffffffff, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.num_msix_vectors = 0,
.shmem_region = 16,
.shmem_protocol = JAILHOUSE_SHMEM_PROTO_UNDEFINED,
},
},
};
