Hi, this series implements mitigations for CVE 2017-5715 (aka Spectre v2).
The first few patches are just some minor cleanups and refactorings. Then I completely moved arch_handle_exit to assembly. Still unrelated to the eventual mitigations, but required to smooth the way (and it's a nice micro optimisation). Like KVM, we will call the mitigation on each exit, before taking the first branch. The mitigation SMC is seen as a hot path, so I implemented a fast path that catapults us back to the guest as fast as possible. The whole fast path, including VMEXIT accounting, fits into the interrupt vector entry, which is pretty nice. Those mitigated paths are implemented via a second interrupt vector table that is conditionally switched on early startup if firmware reports the availability of the mitigation. The series makes the assumption that a processor is affected if the mitigation is available. I hope that's correct. Tested on QEMU ARM64 (w/o firmware support) and on a Jetson TX1, w/ and w/o firmware support. I touched some 32-bit ARM parts as well, but I'm currently on vacation and I only have remote access to the reset buttons of a Jetson TX1. :-) This is why I tagged this series with RFC. Besides the feature lookup, 32-bit ARM support is currently entirely missing. The series can be found here: https://github.com/lfd/jailhouse/tree/arm64-spectre-mitigation Ralf Ralf Ramsauer (17): arm-common: rework psci interface arm, arm64: consolidate traps.h arm, arm64: use proper return types for traps arm64: microoptimise exit path arm64: reorder store of registers in exit path arm64: move vmexit_total increase to assembly arm64: Don't call vmreturn from arch_handle_exit arm64: traps: refactor arch_dump_exit to arch_el2_abt arm64: remove arch_handle_exit arm64: introduce macro helpers that generate irq vectors arm, arm64: add stubs for SMC calls arm64: Initialise SMCCC backend arm64: Mitigate CVE 2017-5715 (aka Spectre v2) arm-common: implement SMCCC feature discovery arm64: implement a fast path for the Spectre v2 workaround arm-common: crash cell on unhandled SMC traps arm64: account SMC fast path .../arch/arm-common/include/asm/percpu.h | 3 + hypervisor/arch/arm-common/include/asm/psci.h | 41 +++- .../arch/arm-common/include/asm/smccc.h | 11 +- .../{arm64 => arm-common}/include/asm/traps.h | 18 +- hypervisor/arch/arm-common/psci.c | 38 ++-- hypervisor/arch/arm-common/setup.c | 3 + hypervisor/arch/arm-common/smccc.c | 77 ++++++- .../arch/arm/include/{ => arch}/asm/traps.h | 21 -- .../arch/arm/include/asm/percpu_fields.h | 1 + hypervisor/arch/arm/include/asm/smc.h | 38 ++++ hypervisor/arch/arm/mmio.c | 2 +- hypervisor/arch/arm/traps.c | 10 +- hypervisor/arch/arm64/asm-defines.c | 6 + hypervisor/arch/arm64/entry.S | 198 ++++++++++++++---- .../arch/arm64/include/arch/asm/traps.h | 21 ++ hypervisor/arch/arm64/include/asm/entry.h | 2 + .../arch/arm64/include/asm/percpu_fields.h | 1 + hypervisor/arch/arm64/include/asm/processor.h | 6 +- hypervisor/arch/arm64/include/asm/smc.h | 36 ++++ hypervisor/arch/arm64/include/asm/sysregs.h | 3 +- hypervisor/arch/arm64/mmio.c | 2 +- hypervisor/arch/arm64/setup.c | 11 +- hypervisor/arch/arm64/traps.c | 40 +--- 23 files changed, 426 insertions(+), 163 deletions(-) rename hypervisor/arch/{arm64 => arm-common}/include/asm/traps.h (57%) rename hypervisor/arch/arm/include/{ => arch}/asm/traps.h (51%) create mode 100644 hypervisor/arch/arm/include/asm/smc.h create mode 100644 hypervisor/arch/arm64/include/arch/asm/traps.h create mode 100644 hypervisor/arch/arm64/include/asm/smc.h -- 2.19.1 -- You received this message because you are subscribed to the Google Groups "Jailhouse" group. To unsubscribe from this group and stop receiving emails from it, send an email to jailhouse-dev+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
