On 10.01.19 15:58, 'Lokesh Vutla' via Jailhouse wrote:
On 10/01/19 11:08 AM, Peng Fan wrote:
Hi Lokesh
-----Original Message-----
From: 'Lokesh Vutla' via Jailhouse [mailto:[email protected]]
Sent: 2019年1月8日 21:24
To: Peng Fan <[email protected]>
Cc: [email protected]
Subject: Re: Jailhouse on iMX8M
Hi Peng,
Sorry to bring up an old thread.
On 13/03/18 9:43 AM, Peng Fan wrote:
Hi Anders,
On Mon, Mar 12, 2018 at 04:52:35PM +0100, Anders T??rnqvist wrote:
I noticed that there are development ongoing for a iMX8M based board.
Great!
When reading in the reference manual for iMX8M it does not have
information about that the chip has virtualization extensions.
The web information about another chip - iMX8 - clearly talks about
virtualization extentions.
The existing Jailhouse development for the iMX8M must be a proof of
some support for virtualization.
Right?
The i.MX8M supports ARM virtualization extension.
I am bit exited to see a doc[1] saying that iMX8Qm doesn't need a SW
hypervisor for running two OSs on the same SoC. Out of curiosity, was
wondering how does the IRQ routing happens without hypervisor? Also I am
interested to see more details on this problem. Are there any public docs that
I take a look?
It is i.MX8QM, not i.MX8M :)
It was developed by other team, I do not have much info.
There is only one GIC controller, so need to config GIC distribute to make sure
SPI are routed to cores correctly, and linux gic code also needs to be modified.
If linux driver is used for configuring gic, then one VM can potentially screw
other VM interrupts no? But anyways it is interesting to see how all the these
problems are solved without hypervisor :)
I suppose it boils down to the questions who is in charge of configuring the
shared resources and who can control the access to it - or it is just standard
collaborative AMP, something everyone did before the arrival of virtualization.
Jan
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Corporate Competence Center Embedded Linux
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