Branch: refs/heads/coverity_scan
Home: https://github.com/siemens/jailhouse
Commit: f596aa7355bc2134650544bdf1e13f1f55d3f2fc
https://github.com/siemens/jailhouse/commit/f596aa7355bc2134650544bdf1e13f1f55d3f2fc
Author: Jan Kiszka <[email protected]>
Date: 2018-09-24 (Mon, 24 Sep 2018)
Changed paths:
M VERSION
Log Message:
-----------
Bump version number
Signed-off-by: Jan Kiszka <[email protected]>
Commit: c6a7818400d7cedda0d083374a88fd10bb6f30a7
https://github.com/siemens/jailhouse/commit/c6a7818400d7cedda0d083374a88fd10bb6f30a7
Author: Jan Kiszka <[email protected]>
Date: 2018-09-27 (Thu, 27 Sep 2018)
Changed paths:
M tools/jailhouse-config-create
Log Message:
-----------
tools: config-create: Adjust defaults to qemu-x86 setup
This allows to reuse the existing inmate configs more easily. 6M of
hypervisor memory is much less than before but should only be a problem
on very large or very old (no VT-d hugepages) systems, so it's
practically fine.
Signed-off-by: Jan Kiszka <[email protected]>
Commit: 06e3ecb5eefc4b199e0a60cb246fedea330caa21
https://github.com/siemens/jailhouse/commit/06e3ecb5eefc4b199e0a60cb246fedea330caa21
Author: Jan Kiszka <[email protected]>
Date: 2018-10-01 (Mon, 01 Oct 2018)
Changed paths:
A configs/arm64/dts/inmate-macchiatobin.dts
A configs/arm64/macchiatobin-gic-demo.c
A configs/arm64/macchiatobin-linux-demo.c
A configs/arm64/macchiatobin.c
Log Message:
-----------
configs: Add support for MACCHIATObin board
Add configs for the Marvell Armada 8040-based MACCHIATObin board.
As we set the pci_domain to 1 and the upstream kernel does not
initialize linux,pci-domain, we need a patch to the DTB for the time
being.
MSI support should eventually be possible as well, but we still with
INTx for the virtual shmem devices for now.
Signed-off-by: Jan Kiszka <[email protected]>
Commit: dd6269a94a50d091d5a76fe4011e5fc491e5bcc6
https://github.com/siemens/jailhouse/commit/dd6269a94a50d091d5a76fe4011e5fc491e5bcc6
Author: Jan Kiszka <[email protected]>
Date: 2018-10-08 (Mon, 08 Oct 2018)
Changed paths:
M driver/cell.c
Log Message:
-----------
driver: x86: Catch unsupported assignment of CPU 0 to non-root cells
Due to the way how CPU 0 is offlined on x86, we cannot "steal" it from
the root cell and give it to a different owner. Catch any configuration
that tries to do so and reject this attempt.
Signed-off-by: Jan Kiszka <[email protected]>
Commit: e20fe893a8a6b3108f06c96fd505732fd52aeda0
https://github.com/siemens/jailhouse/commit/e20fe893a8a6b3108f06c96fd505732fd52aeda0
Author: Jan Kiszka <[email protected]>
Date: 2018-10-08 (Mon, 08 Oct 2018)
Changed paths:
M hypervisor/arch/x86/apic.c
Log Message:
-----------
x86: Clarify and improve rejection of NMI IPIs
While technically doable, re-injecting NMIs from the hypervisor into a
guest is far from being simple. On Intel, we need to take care of
various cases where injection could have failed. On AMD, it even takes
single-stepping over the IRET instruction in order to get to the end of
an NMI-blocking window.
So, remove the to-do note, replacing it with a hint that NMI IPIs will
likely remain unsupported for a longer time. At this chance augment the
printed message with the target CPU of the IPI. This may help to
correlate the effect of a missing NMI or the reason for the injection
(stalled CPU).
Signed-off-by: Jan Kiszka <[email protected]>
Commit: 6f119f396d1bbe87c8ccccd66e8fd4c0669f53b5
https://github.com/siemens/jailhouse/commit/6f119f396d1bbe87c8ccccd66e8fd4c0669f53b5
Author: Claudio Scordino <[email protected]>
Date: 2018-10-10 (Wed, 10 Oct 2018)
Changed paths:
M inmates/demos/x86/apic-demo.c
M inmates/lib/x86/include/inmate.h
M inmates/lib/x86/timing.c
Log Message:
-----------
tsc_read() renamed tsc_read_ns() to avoid misunderstandings.
Signed-off-by: Claudio Scordino <[email protected]>
Signed-off-by: Jan Kiszka <[email protected]>
Commit: 56b2d1d1580b34720f379aede731e7d2ea80d876
https://github.com/siemens/jailhouse/commit/56b2d1d1580b34720f379aede731e7d2ea80d876
Author: Jan Kiszka <[email protected]>
Date: 2018-10-11 (Thu, 11 Oct 2018)
Changed paths:
M driver/sysfs.c
M hypervisor/arch/x86/svm.c
M hypervisor/arch/x86/vmx.c
M include/arch/x86/asm/jailhouse_hypercall.h
Log Message:
-----------
x86, driver: Prepare for finer-grained MSR exist statistics
We will add separate counters for specific frequent MSR accesses.
Prepare by reordering renaming the existing existing counter to
"MSR_OTHER".
Signed-off-by: Jan Kiszka <[email protected]>
Commit: 4bdff00afea92067fee356629f21e25710ad9ae8
https://github.com/siemens/jailhouse/commit/4bdff00afea92067fee356629f21e25710ad9ae8
Author: Jan Kiszka <[email protected]>
Date: 2018-10-11 (Thu, 11 Oct 2018)
Changed paths:
M hypervisor/arch/x86/vmx.c
Log Message:
-----------
x86: vmx: Use local variable for stats in vcpu_handle_exit
Shortens lines and makes it more readable as well.
Signed-off-by: Jan Kiszka <[email protected]>
Commit: 3e9c91302ee5114284227e298883c1098f91001f
https://github.com/siemens/jailhouse/commit/3e9c91302ee5114284227e298883c1098f91001f
Author: Jan Kiszka <[email protected]>
Date: 2018-10-11 (Thu, 11 Oct 2018)
Changed paths:
M hypervisor/arch/x86/apic.c
M hypervisor/arch/x86/svm.c
M hypervisor/arch/x86/vcpu.c
M hypervisor/arch/x86/vmx.c
Log Message:
-----------
x86: Push MSR statistic down to the dispatching points
This is another step in preparing more fine-grained statistics.
Signed-off-by: Jan Kiszka <[email protected]>
Commit: 2482bffc3e130546570299626f50d7b90574ef94
https://github.com/siemens/jailhouse/commit/2482bffc3e130546570299626f50d7b90574ef94
Author: Jan Kiszka <[email protected]>
Date: 2018-10-11 (Thu, 11 Oct 2018)
Changed paths:
M driver/sysfs.c
M hypervisor/arch/x86/apic.c
M include/arch/x86/asm/jailhouse_hypercall.h
Log Message:
-----------
x86, driver: Add MSR_X2APIC_ISR exit counter
ICR accesses are a frequent source of vmexits for multicore cells
when the communicate via IPIs between the cores. Account for these exits
separately.
Signed-off-by: Jan Kiszka <[email protected]>
Commit: 20b7d8d3423aa264caac932e759e97b0ca65b376
https://github.com/siemens/jailhouse/commit/20b7d8d3423aa264caac932e759e97b0ca65b376
Author: Jan Kiszka <[email protected]>
Date: 2018-10-11 (Thu, 11 Oct 2018)
Changed paths:
M tools/jailhouse-cell-stats
Log Message:
-----------
tools: cell-stats: Filter on statistic entries
We are going to add CPU directories, so we need to be stricter with what
we consider a statistic entry.
Signed-off-by: Jan Kiszka <[email protected]>
Commit: 44e19da09b6614146bec15ff1529359dddb02b0c
https://github.com/siemens/jailhouse/commit/44e19da09b6614146bec15ff1529359dddb02b0c
Author: Jan Kiszka <[email protected]>
Date: 2018-10-12 (Fri, 12 Oct 2018)
Changed paths:
M driver/cell.h
M driver/sysfs.c
Log Message:
-----------
driver: Prepare for per-cpu statistics
This refactors the sysfs statistics code so that we can later add
per-CPU counters under the <cell-id>/statistics/ path. Primarily, this
means switching from a attribute group to a kobject for statistics.
Signed-off-by: Jan Kiszka <[email protected]>
Commit: d02306997a69533ad893b11161eb3310ddacac50
https://github.com/siemens/jailhouse/commit/d02306997a69533ad893b11161eb3310ddacac50
Author: Jan Kiszka <[email protected]>
Date: 2018-10-15 (Mon, 15 Oct 2018)
Changed paths:
M Documentation/sysfs-entries.txt
M driver/cell.c
M driver/cell.h
M driver/sysfs.c
Log Message:
-----------
driver: Add per-cpu statistics
The hypervisor already provides us the counter CPU-specific, we just
need to expose them separated, in addition to the existing accumulated
representation. This helps to identify hypervisor interferences in
multicore cells that use core-specific workload.
The CPU-specific statistics are created for all CPUs during root cell
setup as separate kobjects. When a non-root cell is create the kobjects
associated with those CPUs that this cell is assigned are simply moved
from the root cell to the new one. On non-root cell destruction, the
kobjects are moved back. They are truly destroyed on root cell
tear-down.
Signed-off-by: Jan Kiszka <[email protected]>
Commit: d8ea8a43a1a74d5b34afeb4a473cc942ee867abc
https://github.com/siemens/jailhouse/commit/d8ea8a43a1a74d5b34afeb4a473cc942ee867abc
Author: Jan Kiszka <[email protected]>
Date: 2018-10-15 (Mon, 15 Oct 2018)
Changed paths:
M tools/jailhouse-cell-stats
Log Message:
-----------
tools: cell-stats: Visualize also CPU-specific statistics
Add a mode to step through the cell CPUs and display CPU-specific
statistics, just like the overall sum that is shown by default.
Signed-off-by: Jan Kiszka <[email protected]>
Commit: a977f90e4c27e71e831449ea0df4ea386f1c65c0
https://github.com/siemens/jailhouse/commit/a977f90e4c27e71e831449ea0df4ea386f1c65c0
Author: Jan Kiszka <[email protected]>
Date: 2018-10-17 (Wed, 17 Oct 2018)
Changed paths:
M hypervisor/arch/x86/svm.c
M hypervisor/arch/x86/vmx.c
Log Message:
-----------
x86: Fix CONFIG_CRASH_CELL_ON_PANIC
As it is not enabled by default, this became silently broken.
Fixes: 13c472715e29 ("core: Move failed into public per-cpu section")
Signed-off-by: Jan Kiszka <[email protected]>
Commit: 0ef181543fcc3ff47f5f6f502ff88d351304feca
https://github.com/siemens/jailhouse/commit/0ef181543fcc3ff47f5f6f502ff88d351304feca
Author: Ralf Ramsauer <[email protected]>
Date: 2018-10-21 (Sun, 21 Oct 2018)
Changed paths:
M driver/sysfs.c
M hypervisor/arch/arm-common/smccc.c
M include/arch/arm/asm/jailhouse_hypercall.h
M include/arch/arm64/asm/jailhouse_hypercall.h
Log Message:
-----------
arm-common: account for SMC exits
Statistics on ARM currently has some imbalances: the total number of
exits doesn't equal the sum of the fine granular exit counters: we
aren't accounting for SMCCC exits.
Fix this by adding a new statistic counter for SMCCC.
PSCI exits are already accounted inside psci_dispatch(), move SMCCC
accounting to the dispatcher routine handle_smc().
Fixes: 7688e96c815b ("arm-common: Rework handling of SMC")
Signed-off-by: Ralf Ramsauer <[email protected]>
Signed-off-by: Jan Kiszka <[email protected]>
Commit: 2a33e404de0148d81e76e8926a5d2846ce0989c5
https://github.com/siemens/jailhouse/commit/2a33e404de0148d81e76e8926a5d2846ce0989c5
Author: Jan Kiszka <[email protected]>
Date: 2018-11-10 (Sat, 10 Nov 2018)
Changed paths:
M configs/arm/orangepi0.c
Log Message:
-----------
configs: orangepi0: Permit access to another clock
This is required when using 4.19 as root kernel.
Signed-off-by: Jan Kiszka <[email protected]>
Commit: fca44df47c6443fa7ee1fa3a022f6c9029ead5dd
https://github.com/siemens/jailhouse/commit/fca44df47c6443fa7ee1fa3a022f6c9029ead5dd
Author: Ralf Ramsauer <[email protected]>
Date: 2018-11-13 (Tue, 13 Nov 2018)
Changed paths:
A hypervisor/arch/arm-common/include/asm/traps.h
A hypervisor/arch/arm/include/arch/asm/traps.h
R hypervisor/arch/arm/include/asm/traps.h
A hypervisor/arch/arm64/include/arch/asm/traps.h
R hypervisor/arch/arm64/include/asm/traps.h
Log Message:
-----------
arm, arm64: consolidate traps.h
traps.h are almost the same for both arm architectures. The only differences
are struct traps_context and an additional routine (access_cell_regs) on armv7.
Common routines and definitions have their home inside arm-common, so
de-duplicate redundant definitions and give them a new home.
No functional change.
Signed-off-by: Ralf Ramsauer <[email protected]>
Signed-off-by: Jan Kiszka <[email protected]>
Commit: f930d5d9d0c63d3adfd9aaafbe618ab9943b49b7
https://github.com/siemens/jailhouse/commit/f930d5d9d0c63d3adfd9aaafbe618ab9943b49b7
Author: Ralf Ramsauer <[email protected]>
Date: 2018-11-13 (Tue, 13 Nov 2018)
Changed paths:
M hypervisor/arch/arm-common/include/asm/smccc.h
M hypervisor/arch/arm-common/include/asm/traps.h
M hypervisor/arch/arm-common/smccc.c
M hypervisor/arch/arm/mmio.c
M hypervisor/arch/arm/traps.c
M hypervisor/arch/arm64/mmio.c
M hypervisor/arch/arm64/traps.c
Log Message:
-----------
arm, arm64: use proper return types for traps
There is a enum type for the return value of traps: enum trap_return. Use the
proper return type, wherever it is used.
Signed-off-by: Ralf Ramsauer <[email protected]>
Signed-off-by: Jan Kiszka <[email protected]>
Commit: ce4af18b36c7da6670d859939448da8da1432063
https://github.com/siemens/jailhouse/commit/ce4af18b36c7da6670d859939448da8da1432063
Author: Jan Kiszka <[email protected]>
Date: 2018-11-16 (Fri, 16 Nov 2018)
Changed paths:
M CONTRIBUTING.md
Log Message:
-----------
CONTRIBUTING: Fix a typo and clarify statement
Signed-off-by: Jan Kiszka <[email protected]>
Commit: 23ed2b39d625c907341d1d3a240d952e59cce06f
https://github.com/siemens/jailhouse/commit/23ed2b39d625c907341d1d3a240d952e59cce06f
Author: Ralf Ramsauer <[email protected]>
Date: 2018-12-19 (Wed, 19 Dec 2018)
Changed paths:
M hypervisor/arch/arm64/entry.S
Log Message:
-----------
arm64: microoptimise exit path
Similar to 6b02cd08a506 ("inmates: arm64: save registers on irq entry"), use
immediate values to address the absolute offset within the stack when storing
registers.
This is a bit more efficient that the previous push-decrement stack
pattern: While "stp xm, xn, [sp, #-16]!" results in a store followed by
a decrement of the stack pointer, "stp xm, xn, [sp, #(1 * 16)]"
addresses the absolute location inside the stack directly saves the
decrement of sp.
This patch also reverses the order of registers when being pushed. We will
later utilise this.
Signed-off-by: Ralf Ramsauer <[email protected]>
Signed-off-by: Jan Kiszka <[email protected]>
Commit: a0a90f25b1045f62c93b117457580b62a1a2f783
https://github.com/siemens/jailhouse/commit/a0a90f25b1045f62c93b117457580b62a1a2f783
Author: Ralf Ramsauer <[email protected]>
Date: 2018-12-20 (Thu, 20 Dec 2018)
Changed paths:
M hypervisor/arch/arm-common/include/asm/psci.h
M hypervisor/arch/arm-common/psci.c
Log Message:
-----------
arm-common: rework psci interface
Rename some macros, and, in particular, use the same naming scheme as Linux.
This scheme highlights in which version a particular function was introduced.
With this, let's also introduce PSCI version {en,de}coder macros. We will later
benefit from this macros.
No functional change.
Signed-off-by: Ralf Ramsauer <[email protected]>
Signed-off-by: Jan Kiszka <[email protected]>
Commit: 95b29744c06705c244c323f3c75c0632a78f2934
https://github.com/siemens/jailhouse/commit/95b29744c06705c244c323f3c75c0632a78f2934
Author: Ralf Ramsauer <[email protected]>
Date: 2019-01-04 (Fri, 04 Jan 2019)
Changed paths:
M hypervisor/arch/arm64/entry.S
Log Message:
-----------
arm64: reorder store of registers in exit path
If we want to call SMCCC very early in the exit path, we have to store x0-x3
as early as possible. Rearrange the exit path accordingly.
Due to the structure of union registers, we also have to push x4 while not
necessarily required. But this makes things easier at the moment. Nevertheless,
we will benefit from that later: we will use x4 to hold variables that need to
be preserved between SMC calls.
Additionally, decorate things with a few comments.
Signed-off-by: Ralf Ramsauer <[email protected]>
Signed-off-by: Jan Kiszka <[email protected]>
Commit: 42faabcc59eb2c0770cd3bcd593c81552967958d
https://github.com/siemens/jailhouse/commit/42faabcc59eb2c0770cd3bcd593c81552967958d
Author: Ralf Ramsauer <[email protected]>
Date: 2019-01-04 (Fri, 04 Jan 2019)
Changed paths:
M hypervisor/arch/arm64/asm-defines.c
M hypervisor/arch/arm64/entry.S
M hypervisor/arch/arm64/traps.c
Log Message:
-----------
arm64: move vmexit_total increase to assembly
This is the first step to get rid of arch_handle_exit().
Signed-off-by: Ralf Ramsauer <[email protected]>
Signed-off-by: Jan Kiszka <[email protected]>
Commit: 15e02cb81b1da48b9dff37c862a22b7c1127baf9
https://github.com/siemens/jailhouse/commit/15e02cb81b1da48b9dff37c862a22b7c1127baf9
Author: Ralf Ramsauer <[email protected]>
Date: 2019-01-04 (Fri, 04 Jan 2019)
Changed paths:
M hypervisor/arch/arm64/entry.S
M hypervisor/arch/arm64/traps.c
Log Message:
-----------
arm64: Don't call vmreturn from arch_handle_exit
This is the second step to get rid of arch_handle_exit(). There's no need to
call vmreturn() from arch_handle_exit(). Let's move this to assembly.
Signed-off-by: Ralf Ramsauer <[email protected]>
Signed-off-by: Jan Kiszka <[email protected]>
Commit: 65d84dfd3cadf6c89188bba6898dc1e2b0c8c173
https://github.com/siemens/jailhouse/commit/65d84dfd3cadf6c89188bba6898dc1e2b0c8c173
Author: Ralf Ramsauer <[email protected]>
Date: 2019-01-04 (Fri, 04 Jan 2019)
Changed paths:
M hypervisor/arch/arm64/traps.c
Log Message:
-----------
arm64: traps: refactor arch_dump_exit to arch_el2_abt
Step three of removing arch_handle_exit().
There's *no* way the default case can ever occur: The exit reason is a
hard-coded constant value inside the interrupt vector that will never have an
value outside its limited range. No need for special treatment of the default
handler, we can safely remove the arch_dump_exit() call.
With this, arch_dump_exit() only has one single caller left, so fold all
constant arguments inside the function itself, and refactor its name to
arch_el2_abt().
However, leave the panic_park() for the default handler for now, it's a
bug if it is called.
Signed-off-by: Ralf Ramsauer <[email protected]>
Signed-off-by: Jan Kiszka <[email protected]>
Commit: 00f75a77d53e3005adce4db8f9ad6d02d53faffe
https://github.com/siemens/jailhouse/commit/00f75a77d53e3005adce4db8f9ad6d02d53faffe
Author: Ralf Ramsauer <[email protected]>
Date: 2019-01-04 (Fri, 04 Jan 2019)
Changed paths:
M hypervisor/arch/arm64/entry.S
M hypervisor/arch/arm64/include/arch/asm/traps.h
M hypervisor/arch/arm64/include/asm/processor.h
M hypervisor/arch/arm64/traps.c
Log Message:
-----------
arm64: remove arch_handle_exit
The final step: remove arch_handle_exit, and dispatch things directly in
assembly. As a consequence, we get a faster exit path, as we save the
double-dispatching.
We also save one instruction inside the interrupt vector. :-)
For the union registers, replace the exit_reason with __padding. For easier
handling, the padding is located at the beginning of the structure.
Signed-off-by: Ralf Ramsauer <[email protected]>
Signed-off-by: Jan Kiszka <[email protected]>
Commit: 275c097627c6d62261b582a8c3d549893905a3e1
https://github.com/siemens/jailhouse/commit/275c097627c6d62261b582a8c3d549893905a3e1
Author: Ralf Ramsauer <[email protected]>
Date: 2019-01-04 (Fri, 04 Jan 2019)
Changed paths:
M hypervisor/arch/arm64/entry.S
Log Message:
-----------
arm64: introduce macro helpers that generate irq vectors
Logically, we can split up the vmexit_handler in two parts: the early phase,
after which x0-x4 may be clobbered, and the entry phase, that pushes the rest
of the context and enters the exit handler.
These two phases can be rolled out via macros. Later, we use these macro to add
additional (i.e., calling SMCCC_ARCH_WORKAROUND_1) code between the phases.
Signed-off-by: Ralf Ramsauer <[email protected]>
Signed-off-by: Jan Kiszka <[email protected]>
Commit: 03d09b9c3b119ea704edafdd9f358ce57e2a829f
https://github.com/siemens/jailhouse/commit/03d09b9c3b119ea704edafdd9f358ce57e2a829f
Author: Ralf Ramsauer <[email protected]>
Date: 2019-01-04 (Fri, 04 Jan 2019)
Changed paths:
A hypervisor/arch/arm/include/asm/smc.h
A hypervisor/arch/arm64/include/asm/smc.h
Log Message:
-----------
arm, arm64: add stubs for SMC calls
Signed-off-by: Ralf Ramsauer <[email protected]>
Signed-off-by: Jan Kiszka <[email protected]>
Commit: ea924a3fec98684863f6abbdd2860d1ae5c1ea53
https://github.com/siemens/jailhouse/commit/ea924a3fec98684863f6abbdd2860d1ae5c1ea53
Author: Ralf Ramsauer <[email protected]>
Date: 2019-01-04 (Fri, 04 Jan 2019)
Changed paths:
M hypervisor/arch/arm-common/include/asm/percpu.h
M hypervisor/arch/arm-common/include/asm/smccc.h
M hypervisor/arch/arm-common/setup.c
M hypervisor/arch/arm-common/smccc.c
M hypervisor/arch/arm/include/asm/percpu_fields.h
M hypervisor/arch/arm64/include/asm/percpu_fields.h
Log Message:
-----------
arm64: Initialise SMCCC backend
by discovering its features.
The first step is to check the PSCI version. Don't even try to do any
SMCCC calls without having checked the proper PSCI version (current QEMU
horribly crashes).
Probe if SMCCC_ARCH_FEATURES is available. If so, probe for
SMCCC_ARCH_WORKAROUND_1 and expose its availability by setting a flag
inside the percpu structure.
The availability is stored per-cpu, as we might have big.LITTLE systems,
where only a subset of cores need mitigations.
Signed-off-by: Ralf Ramsauer <[email protected]>
Signed-off-by: Jan Kiszka <[email protected]>
Commit: f6a60e64f4815ebc5966dc7b8d7ef603011b1e54
https://github.com/siemens/jailhouse/commit/f6a60e64f4815ebc5966dc7b8d7ef603011b1e54
Author: Ralf Ramsauer <[email protected]>
Date: 2019-01-04 (Fri, 04 Jan 2019)
Changed paths:
M hypervisor/arch/arm-common/include/asm/smccc.h
M hypervisor/arch/arm64/entry.S
M hypervisor/arch/arm64/include/asm/entry.h
M hypervisor/arch/arm64/setup.c
Log Message:
-----------
arm64: Mitigate CVE 2017-5715 (aka Spectre v2)
Define an alternative exit vector. This exit vector will be used if
SMCCC_ARCH_WORKAROUND_1 is available, and makes the assumption that
mitigations are required if the workaround is available.
Technically, the mitigations takes place in the monitor, its implementation
depends on the processor. Refer [1].
Similarly to KVM, Jailhouse calls the monitor's mitigation on each exit: IRQs
and guest aborts.
[1]
https://developer.arm.com/support/arm-security-updates/speculative-processor-vulnerability
Signed-off-by: Ralf Ramsauer <[email protected]>
Signed-off-by: Jan Kiszka <[email protected]>
Commit: bde68834212f554e70007bfa11de6fc0b970444e
https://github.com/siemens/jailhouse/commit/bde68834212f554e70007bfa11de6fc0b970444e
Author: Ralf Ramsauer <[email protected]>
Date: 2019-01-04 (Fri, 04 Jan 2019)
Changed paths:
M hypervisor/arch/arm-common/smccc.c
Log Message:
-----------
arm-common: implement SMCCC feature discovery
Finally, report supported features to guests. This will only affect
non-root cells. The root-cell boots with absence of jailhouse and will,
thus, use the features it already discovered.
This is not the case for non-root cells. Report availability of
mitigations properly.
Signed-off-by: Ralf Ramsauer <[email protected]>
Signed-off-by: Jan Kiszka <[email protected]>
Commit: 0234c87e776217d55c5d6e65da2d0cde20ae42eb
https://github.com/siemens/jailhouse/commit/0234c87e776217d55c5d6e65da2d0cde20ae42eb
Author: Ralf Ramsauer <[email protected]>
Date: 2019-01-06 (Sun, 06 Jan 2019)
Changed paths:
M hypervisor/arch/arm64/entry.S
M hypervisor/arch/arm64/include/asm/sysregs.h
Log Message:
-----------
arm64: implement a fast path for the Spectre v2 workaround
In case of an EL1 abort, call the mitigation, and try to return to the
guest as fast as possible, if it explicitely called the mitigation.
Otherwise, handle the trap as usual.
The whole hot path of the workaround fits into the interrupt vector
slot, we just have to outsource the regular exit path to el1_trap.
Signed-off-by: Ralf Ramsauer <[email protected]>
Signed-off-by: Jan Kiszka <[email protected]>
Commit: 075879bd0d480edec05e8f894d6b7af0ab0ccffb
https://github.com/siemens/jailhouse/commit/075879bd0d480edec05e8f894d6b7af0ab0ccffb
Author: Ralf Ramsauer <[email protected]>
Date: 2019-01-06 (Sun, 06 Jan 2019)
Changed paths:
M hypervisor/arch/arm-common/smccc.c
Log Message:
-----------
arm-common: crash cell on unhandled SMC traps
Crash a cell if it calls an unhandled SMC functions.
There are two reason why to do this:
- Not all SMC calls have return values. If the hypervisor returns with
UNHANDLED, the guest may silently fail as it takes wrong
assumptions. (This is what already happened to us)
- A guest may only invoke SMC functions which it has discovered
before. If there are new functions that we might have to implement
in future, the crash will lead us the way.
Note that the default handler crashes the cell in case of
ARCH_SMCCC_WORKAROUND_1, as the default handler path will only be taken
in case of default interrupt vectors, where the workaround is not
available.
Signed-off-by: Ralf Ramsauer <[email protected]>
[Jan: preserve function_id variable for better readability]
Signed-off-by: Jan Kiszka <[email protected]>
Commit: ac7d29b4e894c0138285aea72fd9475f6b7d87e9
https://github.com/siemens/jailhouse/commit/ac7d29b4e894c0138285aea72fd9475f6b7d87e9
Author: Ralf Ramsauer <[email protected]>
Date: 2019-01-06 (Sun, 06 Jan 2019)
Changed paths:
M hypervisor/arch/arm64/asm-defines.c
M hypervisor/arch/arm64/entry.S
Log Message:
-----------
arm64: account SMC fast path
Housekeeping: Don't forget to account the fast path. This still fits
into the interrupt vector entry.
Signed-off-by: Ralf Ramsauer <[email protected]>
Signed-off-by: Jan Kiszka <[email protected]>
Commit: 66ed9742c5715fe76012c8fc5caad2177f0bca8d
https://github.com/siemens/jailhouse/commit/66ed9742c5715fe76012c8fc5caad2177f0bca8d
Author: Jan Kiszka <[email protected]>
Date: 2019-01-06 (Sun, 06 Jan 2019)
Changed paths:
M Documentation/hypervisor-interfaces.txt
M Documentation/setup-on-zynqmp-zcu102.md
Log Message:
-----------
Documentation: Replace remaining JAILHOUSE_CELL_DEBUG_CONSOLE references
Signed-off-by: Jan Kiszka <[email protected]>
Commit: e3cf65e67a605ead840f6d21d07627172185d13d
https://github.com/siemens/jailhouse/commit/e3cf65e67a605ead840f6d21d07627172185d13d
Author: Jan Kiszka <[email protected]>
Date: 2019-01-06 (Sun, 06 Jan 2019)
Changed paths:
M Documentation/setup-on-zynqmp-zcu102.md
R configs/arm64/dts/inmate-zynqmp-zcu102.dts
A configs/arm64/dts/inmate-zynqmp.dts
A configs/arm64/ultra96-gic-demo.c
A configs/arm64/ultra96-linux-demo.c
A configs/arm64/ultra96.c
Log Message:
-----------
configs: Add Ultra96 board
This is very similar to the ZCU102 eval board, but still different.
However, we can share at least the inmate device tree.
Signed-off-by: Jan Kiszka <[email protected]>
Commit: 5b7492a3aa86d4619e19c24fbdc0eaade860706b
https://github.com/siemens/jailhouse/commit/5b7492a3aa86d4619e19c24fbdc0eaade860706b
Author: Henning Schild <[email protected]>
Date: 2019-01-13 (Sun, 13 Jan 2019)
Changed paths:
M hypervisor/setup.c
Log Message:
-----------
core: Update comment according to recent change
37c7b05b21 renamed the flag JAILHOUSE_CON2_TYPE_ROOTPAGE, update that
last remaining comment as well
Signed-off-by: Henning Schild <[email protected]>
Signed-off-by: Jan Kiszka <[email protected]>
Commit: 8fe9186dc609182f50825a4958abafbc55693e65
https://github.com/siemens/jailhouse/commit/8fe9186dc609182f50825a4958abafbc55693e65
Author: Jan Kiszka <[email protected]>
Date: 2019-01-24 (Thu, 24 Jan 2019)
Changed paths:
M pyjailhouse/sysfs_parser.py
M tools/jailhouse-config-create
Log Message:
-----------
tools, pyjailhouse: Fix offline mode of config generator
This addresses three issues that were introduced while factoring out the
sysfs parser from the the config generator:
- sysfs_parser.root_dir cannot be set from outside of he module -
introduce a setter function instead
- we need to initialize the root dir prior to performing the jailhouse
enabled check
- os.path.join drops any earlier elements if a later one is an absolute
path - switch back to plain '+'
Fixes: 20a83313ea74 ("Splitting up helpers used in sysfs parsing")
Signed-off-by: Jan Kiszka <[email protected]>
Commit: a9aeb698f216fd274f4731bcc2bb90f0c638a1eb
https://github.com/siemens/jailhouse/commit/a9aeb698f216fd274f4731bcc2bb90f0c638a1eb
Author: Jan Kiszka <[email protected]>
Date: 2019-01-24 (Thu, 24 Jan 2019)
Changed paths:
M pyjailhouse/sysfs_parser.py
Log Message:
-----------
pyjailhouse: sysfs_parser: Fix msix_address calculation
A missing brace caused 64-bit addresses to be truncated to 32-bit.
Signed-off-by: Jan Kiszka <[email protected]>
Commit: 3a4f41730235c24f57cfe54eed34f44b3470629d
https://github.com/siemens/jailhouse/commit/3a4f41730235c24f57cfe54eed34f44b3470629d
Author: Jan Kiszka <[email protected]>
Date: 2019-01-24 (Thu, 24 Jan 2019)
Changed paths:
M TODO.md
Log Message:
-----------
TODO: Remove some resolved items
Signed-off-by: Jan Kiszka <[email protected]>
Compare:
https://github.com/siemens/jailhouse/compare/2fd277e591ec...3a4f41730235
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