Branch: refs/heads/coverity_scan
Home: https://github.com/siemens/jailhouse
Commit: f7604e0b4beda5985aceebe50228c3e14abe4d0b
https://github.com/siemens/jailhouse/commit/f7604e0b4beda5985aceebe50228c3e14abe4d0b
Author: Jan Kiszka <[email protected]>
Date: 2019-06-06 (Thu, 06 Jun 2019)
Changed paths:
M hypervisor/arch/x86/vtd.c
Log Message:
-----------
x86: vtd: Use proper MMIO_ERROR instead of -1
No functional change as the value stays the same.
Signed-off-by: Jan Kiszka <[email protected]>
Commit: d07b0dcba4837e2f5cc9799d777a32b1ab5f7936
https://github.com/siemens/jailhouse/commit/d07b0dcba4837e2f5cc9799d777a32b1ab5f7936
Author: Andrej Utz <[email protected]>
Date: 2019-06-07 (Fri, 07 Jun 2019)
Changed paths:
M pyjailhouse/sysfs_parser.py
Log Message:
-----------
pyjailhouse: sysfs_parser: fix IVDM memory region definition
Second parameter to MemRegion must be its end (inclusive).
Fixes: 5fe206927c05 ("tools: Implement ACPI IVRS table parser")
Signed-off-by: Andrej Utz <[email protected]>
Signed-off-by: Jan Kiszka <[email protected]>
Commit: 8c5b95c43a8c41a2f648a8d3b0b95533916cca17
https://github.com/siemens/jailhouse/commit/8c5b95c43a8c41a2f648a8d3b0b95533916cca17
Author: Ralf Ramsauer <[email protected]>
Date: 2019-06-07 (Fri, 07 Jun 2019)
Changed paths:
M hypervisor/arch/x86/include/asm/mmio.h
M hypervisor/arch/x86/mmio.c
M hypervisor/arch/x86/vcpu.c
M inmates/tests/x86/mmio-access-32.c
M inmates/tests/x86/mmio-access.c
Log Message:
-----------
x86: mmio: fix accidental clears of bits in registers
We trap certain MMIO accesses and need to emulate their access.
On x86, a 32-bit read will clear bits 32-63 of a register.
Inconsistently, on x86, 16-bit and 8-bit reads must not clear high bits.
Jailhouse erroneously cleared those bits. Prevent this by applying a
preserved mask that keeps bits alive.
Add tests that check correct behaviour.
Signed-off-by: Ralf Ramsauer <[email protected]>
[Jan: dropped redundant EXPECT_EQUAL]
Signed-off-by: Jan Kiszka <[email protected]>
Commit: a39be9c3499f51a05dedf5b8612cee42f82db659
https://github.com/siemens/jailhouse/commit/a39be9c3499f51a05dedf5b8612cee42f82db659
Author: Ralf Ramsauer <[email protected]>
Date: 2019-06-07 (Fri, 07 Jun 2019)
Changed paths:
M hypervisor/arch/x86/mmio.c
Log Message:
-----------
x86: mmio: move flags to struct parse_context
We can easier pass them around if flags are stored in struct
parse_context.
Just a preparation, no functional change so far.
Signed-off-by: Ralf Ramsauer <[email protected]>
Signed-off-by: Jan Kiszka <[email protected]>
Commit: 96157677dfbb37cc112e4384bbd4c585f9d98af6
https://github.com/siemens/jailhouse/commit/96157677dfbb37cc112e4384bbd4c585f9d98af6
Author: Ralf Ramsauer <[email protected]>
Date: 2019-06-07 (Fri, 07 Jun 2019)
Changed paths:
M hypervisor/arch/x86/include/asm/processor.h
M hypervisor/arch/x86/mmio.c
M inmates/tests/x86/mmio-access-32.c
M inmates/tests/x86/mmio-access.c
Log Message:
-----------
x86: mmio: add support for 0x66 operand prefix
mov (%rax), %ax is a 16-bit data MOV_FROM_MEM that will emit
0x66 0x8b 0x00.
0x66 is the operand-size override prefix which we currently do not support.
We should support it, as we can find this opcode, for example, for some
mmconfig space access from Linux (e.g., pci_generic_config_read).
This also adds appropriate mmio-access tests.
Tested in QEMU virtual target.
Signed-off-by: Ralf Ramsauer <[email protected]>
[Jan: dropped redundant EXPECT_EQUAL, adjusted ebx->rax addressing, tuned
comment]
Signed-off-by: Jan Kiszka <[email protected]>
Commit: 6e27d3af3557c8d1bca5423aee32e828cca567c0
https://github.com/siemens/jailhouse/commit/6e27d3af3557c8d1bca5423aee32e828cca567c0
Author: Jan Kiszka <[email protected]>
Date: 2019-06-10 (Mon, 10 Jun 2019)
Changed paths:
M hypervisor/arch/arm-common/smccc.c
Log Message:
-----------
arm: Account for non-compliant PSCI_VERSION return codes
U-Boot returns PSCI_NOT_SUPPORTED, rather than the implemented 0.2. This
is practically harmless as the succeeding PSCI 1.0 call will then fail,
but it is cleaner to filter out all negative return codes.
Fixes: ea924a3fec98 ("arm64: Initialise SMCCC backend")
Signed-off-by: Jan Kiszka <[email protected]>
Tested-by: Ralf Ramsauer <[email protected]>
Commit: 7c0d292ba15aeaea482be984f9082143fd2bb275
https://github.com/siemens/jailhouse/commit/7c0d292ba15aeaea482be984f9082143fd2bb275
Author: Jan Kiszka <[email protected]>
Date: 2019-06-10 (Mon, 10 Jun 2019)
Changed paths:
M configs/arm/orangepi0.c
Log Message:
-----------
configs: orangepi0: Keep hypervisor away from "secure" memory
U-Boot places its PSCI EL3 code at 0x4ffbb000, and Jailhouse so far
overwrote this during enabling - because it was not secured. This
slipped through widely unnoticed as long as no one tried physical
CPU offline/online after Jailhouse ran. But since we implemented Spectre
mitigation, we started to query the firmware - and crashed. Avoid this
by keeping some safe gap to the firmware, reducing the hypervisor memory
by 320K.
Fixes: MiniDebConf 2019 live demo
Signed-off-by: Jan Kiszka <[email protected]>
Commit: 6ca605d1fd3d6d16cf89fed0812305f81bde8d7d
https://github.com/siemens/jailhouse/commit/6ca605d1fd3d6d16cf89fed0812305f81bde8d7d
Author: Ralf Ramsauer <[email protected]>
Date: 2019-06-10 (Mon, 10 Jun 2019)
Changed paths:
M inmates/tests/x86/mmio-access.c
Log Message:
-----------
inmates: x86: mmio: fix data width of test
The sequence 67 48 a1 f8 1f 10 00 is "addr32 mov 0x101ff8, %rax".
In fact, data is accessed 64-bit wide, and not 32-bit wide as the
comment stated, and as the comparison expected.
0x67 only restricts the absolute address operand, and not the data
width.
Let's also use the mnemonic instead of the binary representation.
Cc: Henning Schild <[email protected]>
Fixes: 23f745cbe19089d ("x86: mmio: Skip over address size prefix found in x32
code")
Signed-off-by: Ralf Ramsauer <[email protected]>
Signed-off-by: Jan Kiszka <[email protected]>
Commit: 9c633193fd583e884a0e3e4af9c16b4e469d7806
https://github.com/siemens/jailhouse/commit/9c633193fd583e884a0e3e4af9c16b4e469d7806
Author: Jan Kiszka <[email protected]>
Date: 2019-06-11 (Tue, 11 Jun 2019)
Changed paths:
M hypervisor/control.c
Log Message:
-----------
core: Reset PCI devices on CELL_SET_LOADABLE
This ensures two things: Physical devices active prior to
CELL_SET_LOADABLE will be silenced (no more DMA) and cannot conflict
with the load operation anymore. And ivshmem devices can send the
information about the reset to their peer earlier than during a later
CELL_START-reset.
This comes at the price of resetting the devices again on CELL_START.
Could be optimized, but not worth it at this point.
Signed-off-by: Jan Kiszka <[email protected]>
Commit: e0de703fa9f3f0f5dd50f00b8484778ec0c9c158
https://github.com/siemens/jailhouse/commit/e0de703fa9f3f0f5dd50f00b8484778ec0c9c158
Author: Jan Kiszka <[email protected]>
Date: 2019-06-11 (Tue, 11 Jun 2019)
Changed paths:
M hypervisor/arch/x86/vtd.c
Log Message:
-----------
x86: Clarify why we call arch_ivshmem_update_msix on vtd_emulate_inv_int
No functional change, just documenting the possibly non-obvious.
Signed-off-by: Jan Kiszka <[email protected]>
Compare:
https://github.com/siemens/jailhouse/compare/0c3e5eb67e17...e0de703fa9f3
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