On 17.06.19 16:27, 'Pratyush Yadav' via Jailhouse wrote:
Hi,
I am writing a driver for a device that accesses some in-memory data structures.
Right now I'm using page_alloc(&mem_pool, ...) to allocate those structures,
but I suspect this memory is cacheable, and thus updates to the in-memory
structures won't necessarily be visible to the device.
I suspect you mean you write a driver inside Jailhouse, right? Why is that
driver needed in hypervisor space?
Yes, hypervisor memory, including that which comes from page_alloc, is mapped
cacheable. But why can't you evict the content from cache to RAM when that
device should see it? That's how we generally work.
There is enum paging_coherent in hypervisor/include/jailhouse/paging.h that is
passed as an argument to paging_create() that does exactly what I want. But
there doesn't seem to be any API/memory pool that allocates memory using this
flag.
PAGING_COHERENT just means that we flush page table entries along the
construction because the table has been in use already and we will not perform a
full flush after all changes are applied. It says nothing about the caching
attributes of the mapped page(s).
I tried allocating memory from the remap pool, and then remapped that memory to
the same address but with PAGING_COHERENT instead. But that causes an exception
as soon as anything tries to access the memory.
What is the recommended way to allocate coherent memory?
I suspect you mapped back the virtual address of the page, not the physical one,
no? Still, haven the memory cached and flushing caches as needed still sounds
like the better pattern to me.
Jan
--
Siemens AG, Corporate Technology, CT RDA IOT SES-DE
Corporate Competence Center Embedded Linux
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