Branch: refs/heads/next
Home: https://github.com/siemens/jailhouse
Commit: dd6efa9840fb5455f9880ec16522fa50a53db9d4
https://github.com/siemens/jailhouse/commit/dd6efa9840fb5455f9880ec16522fa50a53db9d4
Author: Ralf Ramsauer <[email protected]>
Date: 2019-06-19 (Wed, 19 Jun 2019)
Changed paths:
M hypervisor/arch/arm-common/pci.c
M hypervisor/arch/x86/pci.c
M hypervisor/include/jailhouse/mmio.h
Log Message:
-----------
pci: Replace mmio_write64 with mmio_write64_split
MSI-X vector tables hold 64-bit entries. So far, we used mmio_write64 to
set them.
This conforms the PCI specification: "For all accesses to MSI-X Table and MSI-X
PBA fields, software must use aligned full DWORD or aligned full QWORD
transactions; otherwise the result is undefined" (PCI Local Bus Specification
Rev 3.0, chapter 6.8.2).
Nevertheless, some vendors don't support 64-bit writes, e.g., Broadcom ethernet
cards (BCM5720). mmio_write64 stalls, and the transfer won't happen.
Replace mmio_write64 with a wrapper mmio_write64_split that substitutes the
64-bit write with two 32-bit write operations. This accessor first writes the
upper 32 bits and then the lower 32 bits.
Credits go to Jan, the root cause of this bug was found in a private off-list
discussion.
Signed-off-by: Ralf Ramsauer <[email protected]>
Signed-off-by: Jan Kiszka <[email protected]>
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