Hi,
On 7/1/19 6:46 PM, Jan Kiszka wrote:
>> Got it running. The issue was that the config generator fully mapped all
>> PCI Bus regions:
>>
>> /* MemRegion: 380000000000-380fffffffff : PCI Bus 0000:00 */
>> {
>> .phys_start = 0x380000000000,
>> .virt_start = 0x380000000000,
>> .size = 0x1000000000,
>> .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
>> },
>> [...]
>>
>> So access wasn't intercepted at all as those pages were fully mapped.
>> After commenting out all of those regions everything works as expected
>> (well, not tested against another endpoint, but at least ivshmem-net
>> successfully probes).
>>
>> The config generator created those regions. Happens on master, next and
>> older versions. I guess this happens as those regions don't have any
>> siblings -- they should probably be filtered out. Find the iomem
>> attached.
>>
>> BTW: This behavior can be reconstructed by running the config generator
>> on the qemu virtual target for x86.
>
> Ugh. Needs fixing...
>
> Seems the longer I wait with the release, the more pieces are falling
> off (currently fighting against broken dt overlays, thus virtual PCI, on
> ARM with latest kernels, including stable ones).
>
> Jan
We still have some issues adding ivshmem-net to the root and non-root
Linux cell. Devices successfully probe on both endpoints, the hypervisor
reports that the connection is established. Nevertheless, I can't
send/receive packets.
Looks like the device doesn't come really up, but ifconfig reports the
device would be up (on both sides). If I send packets over the
interface, I don't get a call on any function of ivshmem-net.
After initialisation, ivshmem_net_run immediately returns, as
'in->lstate < IVSHMEM_NET_STATE_READY' is true: in->lstate stucks in
INIT state.
I suspect this is probably caused by a configuration mistake, but I
don't see anything suspicious in the configuration. Please find the
sysconfig, and the inmate config attached. (dactales is just the name of
our linux non-root inmate).
Am I missing anything there?
BTW: When are packets being sent over the interface? Do I need a remote
endpoint, or are packets also sent without having a peer?
The reason why I ask: I'm not entirely sure, if I'm able to send/receive
interrupts in the non-root world.
There, ivshmem-net registers int 24:
24: 0 PCI-MSI 16384-edge ivshmem-net[0000:00:01.0]
Does the non-root cell the corresponding irqchip?
IOAPIC[0]: apic_id 8, version 32, address 0xfec00000, GSI 0-23
IOAPIC[1]: apic_id 9, version 32, address 0xfec01000, GSI 24-31
Currently, non-root only sees IOAPIC[0], and afaict, the jailhouse
paravirt driver only registers ioapic[0].
Thanks
Ralf
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/*
* Jailhouse, a Linux-based partitioning hypervisor
*
* Copyright (c) Siemens AG, 2014-2017
*
* This work is licensed under the terms of the GNU GPL, version 2. See
* the COPYING file in the top-level directory.
*
* Alternatively, you can use or redistribute this file under the following
* BSD license:
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
* THE POSSIBILITY OF SUCH DAMAGE.
*
* Configuration for Dell Inc. PowerEdge T440
* created with '/usr/local/libexec/jailhouse/jailhouse config create fresh_dell.c'
*
* NOTE: This config expects the following to be appended to your kernel cmdline
* "memmap=0x200000000$0x100000000"
*/
#include <jailhouse/types.h>
#include <jailhouse/cell-config.h>
#include "dell.h"
struct {
struct jailhouse_system header;
__u64 cpus[1];
struct jailhouse_memory mem_regions[63];
struct jailhouse_irqchip irqchips[5];
__u8 pio_bitmap[0x2000];
struct jailhouse_pci_device pci_devices[124];
struct jailhouse_pci_capability pci_caps[80];
} __attribute__((packed)) config = {
.header = {
.signature = JAILHOUSE_SYSTEM_SIGNATURE,
.revision = JAILHOUSE_CONFIG_REVISION,
.flags = JAILHOUSE_SYS_VIRTUAL_DEBUG_CONSOLE,
.hypervisor_memory = {
.phys_start = HYPERVISOR_BASE,
.size = HYPERVISOR_SIZE,
},
.debug_console = {
.address = 0x3f8,
.type = JAILHOUSE_CON_TYPE_8250,
.flags = JAILHOUSE_CON_ACCESS_PIO |
JAILHOUSE_CON_REGDIST_1,
},
.platform_info = {
.pci_mmconfig_base = 0x80000000,
.pci_mmconfig_end_bus = 0xff,
.x86 = {
.pm_timer_address = 0x508,
.vtd_interrupt_limit = 512,
.iommu_units = {
{
.base = 0xc5ffc000,
.size = 0x1000,
},
{
.base = 0xe0ffc000,
.size = 0x1000,
},
{
.base = 0xfbffc000,
.size = 0x1000,
},
{
.base = 0xaaffc000,
.size = 0x1000,
},
},
},
},
.root_cell = {
.name = "RootCell",
.cpu_set_size = sizeof(config.cpus),
.num_memory_regions = ARRAY_SIZE(config.mem_regions),
.num_irqchips = ARRAY_SIZE(config.irqchips),
.pio_bitmap_size = ARRAY_SIZE(config.pio_bitmap),
.num_pci_devices = ARRAY_SIZE(config.pci_devices),
.num_pci_caps = ARRAY_SIZE(config.pci_caps),
},
},
.cpus = {
0x0000000000000fff,
},
.mem_regions = {
/* MemRegion: 00000000-0009ffff : System RAM */
{
.phys_start = 0x0,
.virt_start = 0x0,
.size = 0xa0000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA,
},
/* MemRegion: 00100000-00ffffff : System RAM */
/* MemRegion: 01000000-02ffffff : Kernel */
/* MemRegion: 03000000-5411001f : System RAM */
/* MemRegion: 54110020-5414145f : System RAM */
/* MemRegion: 54141460-5414201f : System RAM */
/* MemRegion: 54142020-5417345f : System RAM */
/* MemRegion: 54173460-5420401f : System RAM */
/* MemRegion: 54204020-5421c65f : System RAM */
/* MemRegion: 5421c660-5428301f : System RAM */
/* MemRegion: 54283020-5428b05f : System RAM */
/* MemRegion: 5428b060-56101fff : System RAM */
{
.phys_start = 0x100000,
.virt_start = 0x100000,
.size = 0x56002000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA,
},
/* MemRegion: 5e10a000-5f531fff : System RAM */
{
.phys_start = 0x5e10a000,
.virt_start = 0x5e10a000,
.size = 0x1428000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA,
},
/* MemRegion: 5f610000-611bdfff : System RAM */
{
.phys_start = 0x5f610000,
.virt_start = 0x5f610000,
.size = 0x1bae000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA,
},
/* MemRegion: 651be000-6c2cefff : System RAM */
{
.phys_start = 0x651be000,
.virt_start = 0x651be000,
.size = 0x7111000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA,
},
/* MemRegion: 6e7cf000-6f5fefff : ACPI Non-volatile Storage */
{
.phys_start = 0x6e7cf000,
.virt_start = 0x6e7cf000,
.size = 0xe30000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 6f5ff000-6f7fefff : ACPI Tables */
{
.phys_start = 0x6f5ff000,
.virt_start = 0x6f5ff000,
.size = 0x200000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 6f7ff000-6f7fffff : System RAM */
{
.phys_start = 0x6f7ff000,
.virt_start = 0x6f7ff000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA,
},
/* MemRegion: 90000000-90007fff : 0000:01:00.0 */
{
.phys_start = 0x90000000,
.virt_start = 0x90000000,
.size = 0x8000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 90100000-9013ffff : 0000:04:00.0 */
{
.phys_start = 0x90100000,
.virt_start = 0x90100000,
.size = 0x40000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 90140000-9017ffff : 0000:04:00.1 */
{
.phys_start = 0x90140000,
.virt_start = 0x90140000,
.size = 0x40000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 91000000-912fffff : efifb */
{
.phys_start = 0x91000000,
.virt_start = 0x91000000,
.size = 0x300000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92000000-927fffff : 0000:03:00.0 */
{
.phys_start = 0x92000000,
.virt_start = 0x92000000,
.size = 0x800000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92808000-9280bfff : 0000:03:00.0 */
{
.phys_start = 0x92808000,
.virt_start = 0x92808000,
.size = 0x4000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92900000-92907fff : 0000:01:00.0 */
{
.phys_start = 0x92900000,
.virt_start = 0x92900000,
.size = 0x8000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92a00000-92a0ffff : tg3 */
{
.phys_start = 0x92a00000,
.virt_start = 0x92a00000,
.size = 0x10000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92a10000-92a1ffff : tg3 */
{
.phys_start = 0x92a10000,
.virt_start = 0x92a10000,
.size = 0x10000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92a21000-92a2ffff : tg3 */
{
.phys_start = 0x92a21000,
.virt_start = 0x92a21000,
.size = 0xf000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92a30000-92a3ffff : tg3 */
{
.phys_start = 0x92a30000,
.virt_start = 0x92a30000,
.size = 0x10000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92a40000-92a4ffff : tg3 */
{
.phys_start = 0x92a40000,
.virt_start = 0x92a40000,
.size = 0x10000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92a51000-92a5ffff : tg3 */
{
.phys_start = 0x92a51000,
.virt_start = 0x92a51000,
.size = 0xf000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92b00000-92b7ffff : ahci */
{
.phys_start = 0x92b00000,
.virt_start = 0x92b00000,
.size = 0x80000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92b80000-92bfffff : ahci */
{
.phys_start = 0x92b80000,
.virt_start = 0x92b80000,
.size = 0x80000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92c00000-92c0ffff : 0000:00:14.0 */
{
.phys_start = 0x92c00000,
.virt_start = 0x92c00000,
.size = 0x10000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92c10000-92c13fff : 0000:00:1f.2 */
{
.phys_start = 0x92c10000,
.virt_start = 0x92c10000,
.size = 0x4000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92c14000-92c15fff : ahci */
{
.phys_start = 0x92c14000,
.virt_start = 0x92c14000,
.size = 0x2000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92c16000-92c17fff : ahci */
{
.phys_start = 0x92c16000,
.virt_start = 0x92c16000,
.size = 0x2000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92c18000-92c180ff : 0000:00:1f.4 */
{
.phys_start = 0x92c18000,
.virt_start = 0x92c18000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92c19000-92c19fff : 0000:00:16.4 */
{
.phys_start = 0x92c19000,
.virt_start = 0x92c19000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92c1a000-92c1afff : 0000:00:16.1 */
{
.phys_start = 0x92c1a000,
.virt_start = 0x92c1a000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92c1b000-92c1bfff : 0000:00:16.0 */
{
.phys_start = 0x92c1b000,
.virt_start = 0x92c1b000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92c1c000-92c1cfff : 0000:00:14.2 */
{
.phys_start = 0x92c1c000,
.virt_start = 0x92c1c000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92c1e000-92c1e0ff : ahci */
{
.phys_start = 0x92c1e000,
.virt_start = 0x92c1e000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92c1f000-92c1f0ff : ahci */
{
.phys_start = 0x92c1f000,
.virt_start = 0x92c1f000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92c20000-92c20fff : 0000:00:05.4 */
{
.phys_start = 0x92c20000,
.virt_start = 0x92c20000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: ab000000-ab007fff : 0000:17:00.0 */
{
.phys_start = 0xab000000,
.virt_start = 0xab000000,
.size = 0x8000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: ab100000-ab100fff : 0000:16:05.4 */
{
.phys_start = 0xab100000,
.virt_start = 0xab100000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: ab200000-ab207fff : 0000:17:00.0 */
{
.phys_start = 0xab200000,
.virt_start = 0xab200000,
.size = 0x8000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: c6000000-c6000fff : 0000:64:05.4 */
{
.phys_start = 0xc6000000,
.virt_start = 0xc6000000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: e1000000-e10fffff : 0000:b3:00.0 */
{
.phys_start = 0xe1000000,
.virt_start = 0xe1000000,
.size = 0x100000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: e1100000-e110dfff : megasas: LSI */
{
.phys_start = 0xe1100000,
.virt_start = 0xe1100000,
.size = 0xe000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: e110f000-e110ffff : megasas: LSI */
{
.phys_start = 0xe110f000,
.virt_start = 0xe110f000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: e1200000-e1200fff : 0000:b2:05.4 */
{
.phys_start = 0xe1200000,
.virt_start = 0xe1200000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: fd000000-fdabffff : pnp 00:04 */
{
.phys_start = 0xfd000000,
.virt_start = 0xfd000000,
.size = 0xac0000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: fdad0000-fdadffff : pnp 00:04 */
{
.phys_start = 0xfdad0000,
.virt_start = 0xfdad0000,
.size = 0x10000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: fdc6000c-fdc6000f : iTCO_wdt */
{
.phys_start = 0xfdc6000c,
.virt_start = 0xfdc6000c,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: fe011000-fe01ffff : pnp 00:04 */
{
.phys_start = 0xfe011000,
.virt_start = 0xfe011000,
.size = 0xf000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: fe036000-fe03bfff : pnp 00:04 */
{
.phys_start = 0xfe036000,
.virt_start = 0xfe036000,
.size = 0x6000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: fe03d000-fe3fffff : pnp 00:04 */
{
.phys_start = 0xfe03d000,
.virt_start = 0xfe03d000,
.size = 0x3c3000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: fe410000-fe7fffff : pnp 00:04 */
{
.phys_start = 0xfe410000,
.virt_start = 0xfe410000,
.size = 0x3f0000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: fed00000-fed003ff : PNP0103:00 */
{
.phys_start = 0xfed00000,
.virt_start = 0xfed00000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: fed12000-fed1200f : pnp 00:01 */
{
.phys_start = 0xfed12000,
.virt_start = 0xfed12000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: fed12010-fed1201f : pnp 00:01 */
{
.phys_start = 0xfed12010,
.virt_start = 0xfed12010,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: fed1b000-fed1bfff : pnp 00:01 */
{
.phys_start = 0xfed1b000,
.virt_start = 0xfed1b000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: fed1c000-fed3ffff : pnp 00:01 */
{
.phys_start = 0xfed1c000,
.virt_start = 0xfed1c000,
.size = 0x24000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: fed45000-fed8bfff : pnp 00:01 */
{
.phys_start = 0xfed45000,
.virt_start = 0xfed45000,
.size = 0x47000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: fee00000-feefffff : pnp 00:01 */
{
.phys_start = 0xfee00000,
.virt_start = 0xfee00000,
.size = 0x100000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: ff000000-ffffffff : pnp 00:01 */
{
.phys_start = 0xff000000,
.virt_start = 0xff000000,
.size = 0x1000000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 300000000-87fffffff : System RAM */
{
.phys_start = 0x300000000,
.virt_start = 0x300000000,
.size = 0x580000000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA,
},
/* MemRegion: 56102000-5e109fff : ACPI DMAR RMRR */
/* PCI device: b3:00.0 */
{
.phys_start = 0x56102000,
.virt_start = 0x56102000,
.size = 0x8008000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA,
},
/* MemRegion: 6f441000-6f443fff : ACPI DMAR RMRR */
/* PCI device: 00:14.0 */
{
.phys_start = 0x6f441000,
.virt_start = 0x6f441000,
.size = 0x3000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA,
},
/* MemRegion: HYPERVISOR_END-IVSHMEM_BASE: JAILHOUSE Inmate Memory */
{
.phys_start = INMATE_BASE,
.virt_start = INMATE_BASE,
.size = INMATE_SIZE,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* IVSHMEM shared memory region */
{
.phys_start = IVSHMEM_BASE,
.virt_start = IVSHMEM_BASE,
.size = IVSHMEM_SIZE,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
},
.irqchips = {
/* IOAPIC 8, GSI base 0 */
{
.address = 0xfec00000,
.id = 0x3f0f8,
.pin_bitmap = {
0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
},
},
/* IOAPIC 9, GSI base 24 */
{
.address = 0xfec01000,
.id = 0x3002c,
.pin_bitmap = {
0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
},
},
/* IOAPIC 10, GSI base 32 */
{
.address = 0xfec08000,
.id = 0x162c,
.pin_bitmap = {
0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
},
},
/* IOAPIC 11, GSI base 40 */
{
.address = 0xfec10000,
.id = 0x1642c,
.pin_bitmap = {
0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
},
},
/* IOAPIC 12, GSI base 48 */
{
.address = 0xfec18000,
.id = 0x2b22c,
.pin_bitmap = {
0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
},
},
},
.pio_bitmap = {
[ 0/8 ... 0x3f/8] = -1,
[ 0x40/8 ... 0x47/8] = 0xf0, /* PIT */
[ 0x48/8 ... 0x5f/8] = -1,
[ 0x60/8 ... 0x67/8] = 0xec, /* HACK: NMI status/control */
[ 0x68/8 ... 0x6f/8] = -1,
[ 0x70/8 ... 0x77/8] = 0xfc, /* RTC */
[ 0x78/8 ... 0x3af/8] = -1,
[ 0x3b0/8 ... 0x3df/8] = 0x00, /* VGA */
[ 0x3e0/8 ... 0xcff/8] = -1,
[ 0xd00/8 ... 0xffff/8] = 0, /* HACK: PCI bus */
},
.pci_devices = {
/* PCIDevice: 00:00.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x0,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 9,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:05.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x28,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 9,
.num_caps = 2,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:05.2 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x2a,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 9,
.num_caps = 2,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:05.4 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x2c,
.bar_mask = {
0xfffff000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 11,
.num_caps = 3,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:08.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x40,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 9,
.num_caps = 2,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:08.1 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x41,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:08.2 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x42,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 9,
.num_caps = 2,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:11.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x88,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 14,
.num_caps = 1,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:11.5 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x8d,
.bar_mask = {
0xffffe000, 0xffffff00, 0xfffffff8,
0xfffffffc, 0xffffffe0, 0xfff80000,
},
.caps_start = 15,
.num_caps = 3,
.num_msi_vectors = 1,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:14.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0xa0,
.bar_mask = {
0xffff0000, 0xffffffff, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 18,
.num_caps = 2,
.num_msi_vectors = 8,
.msi_64bits = 1,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:14.2 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0xa2,
.bar_mask = {
0xfffff000, 0xffffffff, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 20,
.num_caps = 2,
.num_msi_vectors = 1,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:16.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0xb0,
.bar_mask = {
0xfffff000, 0xffffffff, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 22,
.num_caps = 2,
.num_msi_vectors = 1,
.msi_64bits = 1,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:16.1 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0xb1,
.bar_mask = {
0xfffff000, 0xffffffff, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 22,
.num_caps = 2,
.num_msi_vectors = 1,
.msi_64bits = 1,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:16.4 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0xb4,
.bar_mask = {
0xfffff000, 0xffffffff, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 22,
.num_caps = 2,
.num_msi_vectors = 1,
.msi_64bits = 1,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:17.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0xb8,
.bar_mask = {
0xffffe000, 0xffffff00, 0xfffffff8,
0xfffffffc, 0xffffffe0, 0xfff80000,
},
.caps_start = 15,
.num_caps = 3,
.num_msi_vectors = 1,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:1c.0 */
{
.type = JAILHOUSE_PCI_TYPE_BRIDGE,
.iommu = 3,
.domain = 0x0,
.bdf = 0xe0,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 24,
.num_caps = 7,
.num_msi_vectors = 1,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:1c.4 */
{
.type = JAILHOUSE_PCI_TYPE_BRIDGE,
.iommu = 3,
.domain = 0x0,
.bdf = 0xe4,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 31,
.num_caps = 6,
.num_msi_vectors = 1,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:1c.5 */
{
.type = JAILHOUSE_PCI_TYPE_BRIDGE,
.iommu = 3,
.domain = 0x0,
.bdf = 0xe5,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 24,
.num_caps = 7,
.num_msi_vectors = 1,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:1f.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0xf8,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:1f.2 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0xfa,
.bar_mask = {
0xffffc000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:1f.4 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0xfc,
.bar_mask = {
0xffffff00, 0xffffffff, 0x00000000,
0x00000000, 0xffffffe0, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:1f.5 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0xfd,
.bar_mask = {
0xfffff000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 01:00.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x100,
.bar_mask = {
0xffffff00, 0xffff8000, 0xfffffffc,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 37,
.num_caps = 4,
.num_msi_vectors = 32,
.msi_64bits = 1,
.msi_maskable = 1,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 02:00.0 */
{
.type = JAILHOUSE_PCI_TYPE_BRIDGE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x200,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 41,
.num_caps = 5,
.num_msi_vectors = 1,
.msi_64bits = 1,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 03:00.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x300,
.bar_mask = {
0xff000000, 0xffffc000, 0xff800000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 46,
.num_caps = 1,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 04:00.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x400,
.bar_mask = {
0xffff0000, 0xffffffff, 0xffff0000,
0xffffffff, 0xffff0000, 0xffffffff,
},
.caps_start = 47,
.num_caps = 9,
.num_msi_vectors = 8,
.msi_64bits = 1,
.msi_maskable = 0,
.num_msix_vectors = 17,
.msix_region_size = 0x1000,
.msix_address = 0x92a50000,
},
/* PCIDevice: 04:00.1 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x401,
.bar_mask = {
0xffff0000, 0xffffffff, 0xffff0000,
0xffffffff, 0xffff0000, 0xffffffff,
},
.caps_start = 47,
.num_caps = 9,
.num_msi_vectors = 8,
.msi_64bits = 1,
.msi_maskable = 0,
.num_msix_vectors = 17,
.msix_region_size = 0x1000,
.msix_address = 0x92a20000,
},
/* PCIDevice: 16:01.0 */
{
.type = JAILHOUSE_PCI_TYPE_BRIDGE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x1608,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 56,
.num_caps = 12,
.num_msi_vectors = 2,
.msi_64bits = 0,
.msi_maskable = 1,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 16:05.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x1628,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 9,
.num_caps = 2,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 16:05.2 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x162a,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 9,
.num_caps = 2,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 16:05.4 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x162c,
.bar_mask = {
0xfffff000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 11,
.num_caps = 3,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 16:08.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x1640,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 16:08.1 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x1641,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 16:08.2 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x1642,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 16:08.3 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x1643,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 16:08.4 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x1644,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 16:08.5 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x1645,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 16:08.6 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x1646,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 16:08.7 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x1647,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 16:09.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x1648,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 16:09.1 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x1649,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 16:09.2 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x164a,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 16:09.3 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x164b,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 16:09.4 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x164c,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 16:09.5 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x164d,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 16:09.6 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x164e,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 16:09.7 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x164f,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 16:0a.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x1650,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 16:0a.1 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x1651,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 16:0e.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x1670,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 16:0e.1 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x1671,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 16:0e.2 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x1672,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 16:0e.3 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x1673,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 16:0e.4 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x1674,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 16:0e.5 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x1675,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 16:0e.6 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x1676,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 16:0e.7 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x1677,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 16:0f.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x1678,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 16:0f.1 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x1679,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 16:0f.2 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x167a,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 16:0f.3 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x167b,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 16:0f.4 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x167c,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 16:0f.5 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x167d,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 16:0f.6 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x167e,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 16:0f.7 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x167f,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 16:10.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x1680,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 16:10.1 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x1681,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 16:1d.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x16e8,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 16:1d.1 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x16e9,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 16:1d.2 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x16ea,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 16:1d.3 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x16eb,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 16:1e.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x16f0,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 16:1e.1 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x16f1,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 16:1e.2 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x16f2,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 16:1e.3 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x16f3,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 16:1e.4 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x16f4,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 16:1e.5 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x16f5,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 16:1e.6 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x16f6,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 17:00.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 0,
.domain = 0x0,
.bdf = 0x1700,
.bar_mask = {
0xffffff00, 0xffff8000, 0xfffffffc,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 37,
.num_caps = 4,
.num_msi_vectors = 32,
.msi_64bits = 1,
.msi_maskable = 1,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 64:05.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x6428,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 9,
.num_caps = 2,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 64:05.2 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x642a,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 9,
.num_caps = 2,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 64:05.4 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x642c,
.bar_mask = {
0xfffff000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 11,
.num_caps = 3,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 64:08.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x6440,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 68,
.num_caps = 2,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 64:09.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x6448,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 68,
.num_caps = 2,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 64:0a.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x6450,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 68,
.num_caps = 2,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 64:0a.1 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x6451,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 68,
.num_caps = 2,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 64:0a.2 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x6452,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 68,
.num_caps = 2,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 64:0a.3 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x6453,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 68,
.num_caps = 2,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 64:0a.4 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x6454,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 68,
.num_caps = 2,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 64:0a.5 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x6455,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 68,
.num_caps = 2,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 64:0a.6 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x6456,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 68,
.num_caps = 2,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 64:0a.7 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x6457,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 68,
.num_caps = 2,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 64:0b.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x6458,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 68,
.num_caps = 2,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 64:0b.1 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x6459,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 68,
.num_caps = 2,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 64:0b.2 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x645a,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 68,
.num_caps = 2,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 64:0b.3 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x645b,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 68,
.num_caps = 2,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 64:0c.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x6460,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 68,
.num_caps = 2,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 64:0c.1 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x6461,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 68,
.num_caps = 2,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 64:0c.2 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x6462,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 68,
.num_caps = 2,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 64:0c.3 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x6463,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 68,
.num_caps = 2,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 64:0c.4 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x6464,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 68,
.num_caps = 2,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 64:0c.5 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x6465,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 68,
.num_caps = 2,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 64:0c.6 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x6466,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 68,
.num_caps = 2,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 64:0c.7 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x6467,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 68,
.num_caps = 2,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 64:0d.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x6468,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 68,
.num_caps = 2,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 64:0d.1 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x6469,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 68,
.num_caps = 2,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 64:0d.2 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x646a,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 68,
.num_caps = 2,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 64:0d.3 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0x646b,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 68,
.num_caps = 2,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: b2:00.0 */
{
.type = JAILHOUSE_PCI_TYPE_BRIDGE,
.iommu = 3,
.domain = 0x0,
.bdf = 0xb200,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 56,
.num_caps = 12,
.num_msi_vectors = 2,
.msi_64bits = 0,
.msi_maskable = 1,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: b2:05.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0xb228,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 9,
.num_caps = 2,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: b2:05.2 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0xb22a,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 9,
.num_caps = 2,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: b2:05.4 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0xb22c,
.bar_mask = {
0xfffff000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 11,
.num_caps = 3,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: b2:0e.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0xb270,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 9,
.num_caps = 2,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: b2:0e.1 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0xb271,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 70,
.num_caps = 2,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: b2:0f.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0xb278,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 9,
.num_caps = 2,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: b2:0f.1 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0xb279,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 70,
.num_caps = 2,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: b2:12.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0xb290,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 9,
.num_caps = 2,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: b2:12.1 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0xb291,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: b2:12.2 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0xb292,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: b2:15.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0xb2a8,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: b2:16.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0xb2b0,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: b2:16.4 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 3,
.domain = 0x0,
.bdf = 0xb2b4,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: b3:00.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 2,
.domain = 0x0,
.bdf = 0xb300,
.bar_mask = {
0xffffff00, 0xffff0000, 0xffffffff,
0xfff00000, 0xffffffff, 0x00000000,
},
.caps_start = 72,
.num_caps = 8,
.num_msi_vectors = 1,
.msi_64bits = 1,
.msi_maskable = 1,
.num_msix_vectors = 97,
.msix_region_size = 0x1000,
.msix_address = 0xe110e000,
},
/* IVSHMEM: 00:01.0 */
{
.type = JAILHOUSE_PCI_TYPE_IVSHMEM,
.domain = 0x0,
.bdf = 0x08,
.bar_mask = {
0xffffff00, 0xffffffff, 0x00000000,
0x00000000, 0xffffffe0, 0xffffffff,
},
.shmem_region = 62,
.shmem_protocol = JAILHOUSE_SHMEM_PROTO_VETH,
.num_msix_vectors = 1,
},
},
.pci_caps = {
/* PCIDevice: 00:00.0 */
{
.id = PCI_CAP_ID_EXP,
.start = 0x90,
.len = 60,
.flags = 0,
},
{
.id = PCI_CAP_ID_PM,
.start = 0xe0,
.len = 8,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_EXT_CAP_ID_VNDR | JAILHOUSE_PCI_EXT_CAP,
.start = 0x100,
.len = 4,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_VNDR | JAILHOUSE_PCI_EXT_CAP,
.start = 0x144,
.len = 4,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_VNDR | JAILHOUSE_PCI_EXT_CAP,
.start = 0x1d0,
.len = 4,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_SECPCI | JAILHOUSE_PCI_EXT_CAP,
.start = 0x250,
.len = 4,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_VNDR | JAILHOUSE_PCI_EXT_CAP,
.start = 0x280,
.len = 4,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_VNDR | JAILHOUSE_PCI_EXT_CAP,
.start = 0x298,
.len = 4,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_VNDR | JAILHOUSE_PCI_EXT_CAP,
.start = 0x300,
.len = 4,
.flags = 0,
},
/* PCIDevice: 00:05.0 */
/* PCIDevice: 00:05.2 */
/* PCIDevice: 00:08.0 */
/* PCIDevice: 00:08.2 */
/* PCIDevice: 16:05.0 */
/* PCIDevice: 16:05.2 */
/* PCIDevice: 64:05.0 */
/* PCIDevice: 64:05.2 */
/* PCIDevice: b2:05.0 */
/* PCIDevice: b2:05.2 */
/* PCIDevice: b2:0e.0 */
/* PCIDevice: b2:0f.0 */
/* PCIDevice: b2:12.0 */
{
.id = PCI_CAP_ID_EXP,
.start = 0x40,
.len = 60,
.flags = 0,
},
{
.id = 0x0 | JAILHOUSE_PCI_EXT_CAP,
.start = 0x100,
.len = 4,
.flags = 0,
},
/* PCIDevice: 00:05.4 */
/* PCIDevice: 16:05.4 */
/* PCIDevice: 64:05.4 */
/* PCIDevice: b2:05.4 */
{
.id = PCI_CAP_ID_EXP,
.start = 0x44,
.len = 20,
.flags = 0,
},
{
.id = PCI_CAP_ID_PM,
.start = 0xe0,
.len = 8,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = 0x0 | JAILHOUSE_PCI_EXT_CAP,
.start = 0x100,
.len = 4,
.flags = 0,
},
/* PCIDevice: 00:11.0 */
{
.id = PCI_CAP_ID_PM,
.start = 0x80,
.len = 8,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
/* PCIDevice: 00:11.5 */
/* PCIDevice: 00:17.0 */
{
.id = PCI_CAP_ID_MSI,
.start = 0x80,
.len = 10,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_CAP_ID_PM,
.start = 0x70,
.len = 8,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_CAP_ID_SATA,
.start = 0xa8,
.len = 2,
.flags = 0,
},
/* PCIDevice: 00:14.0 */
{
.id = PCI_CAP_ID_PM,
.start = 0x70,
.len = 8,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_CAP_ID_MSI,
.start = 0x80,
.len = 14,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
/* PCIDevice: 00:14.2 */
{
.id = PCI_CAP_ID_PM,
.start = 0x50,
.len = 8,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_CAP_ID_MSI,
.start = 0x80,
.len = 10,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
/* PCIDevice: 00:16.0 */
/* PCIDevice: 00:16.1 */
/* PCIDevice: 00:16.4 */
{
.id = PCI_CAP_ID_PM,
.start = 0x50,
.len = 8,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_CAP_ID_MSI,
.start = 0x8c,
.len = 14,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
/* PCIDevice: 00:1c.0 */
/* PCIDevice: 00:1c.5 */
{
.id = PCI_CAP_ID_EXP,
.start = 0x40,
.len = 60,
.flags = 0,
},
{
.id = PCI_CAP_ID_MSI,
.start = 0x80,
.len = 10,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_CAP_ID_SSVID,
.start = 0x90,
.len = 2,
.flags = 0,
},
{
.id = PCI_CAP_ID_PM,
.start = 0xa0,
.len = 8,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_EXT_CAP_ID_ERR | JAILHOUSE_PCI_EXT_CAP,
.start = 0x100,
.len = 4,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_ACS | JAILHOUSE_PCI_EXT_CAP,
.start = 0x140,
.len = 4,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_SECPCI | JAILHOUSE_PCI_EXT_CAP,
.start = 0x220,
.len = 4,
.flags = 0,
},
/* PCIDevice: 00:1c.4 */
{
.id = PCI_CAP_ID_EXP,
.start = 0x40,
.len = 60,
.flags = 0,
},
{
.id = PCI_CAP_ID_MSI,
.start = 0x80,
.len = 10,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_CAP_ID_SSVID,
.start = 0x90,
.len = 2,
.flags = 0,
},
{
.id = PCI_CAP_ID_PM,
.start = 0xa0,
.len = 8,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_EXT_CAP_ID_ERR | JAILHOUSE_PCI_EXT_CAP,
.start = 0x100,
.len = 4,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_ACS | JAILHOUSE_PCI_EXT_CAP,
.start = 0x140,
.len = 4,
.flags = 0,
},
/* PCIDevice: 01:00.0 */
/* PCIDevice: 17:00.0 */
{
.id = PCI_CAP_ID_PM,
.start = 0x60,
.len = 8,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_CAP_ID_MSI,
.start = 0x68,
.len = 24,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_CAP_ID_EXP,
.start = 0x80,
.len = 60,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_ERR | JAILHOUSE_PCI_EXT_CAP,
.start = 0x100,
.len = 4,
.flags = 0,
},
/* PCIDevice: 02:00.0 */
{
.id = PCI_CAP_ID_MSI,
.start = 0x50,
.len = 14,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_CAP_ID_PM,
.start = 0x78,
.len = 8,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_CAP_ID_EXP,
.start = 0x80,
.len = 60,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_VC | JAILHOUSE_PCI_EXT_CAP,
.start = 0x100,
.len = 4,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_ERR | JAILHOUSE_PCI_EXT_CAP,
.start = 0x800,
.len = 4,
.flags = 0,
},
/* PCIDevice: 03:00.0 */
{
.id = PCI_CAP_ID_PM,
.start = 0xdc,
.len = 8,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
/* PCIDevice: 04:00.0 */
/* PCIDevice: 04:00.1 */
{
.id = PCI_CAP_ID_PM,
.start = 0x48,
.len = 8,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_CAP_ID_VPD,
.start = 0x50,
.len = 2,
.flags = 0,
},
{
.id = PCI_CAP_ID_MSI,
.start = 0x58,
.len = 14,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_CAP_ID_MSIX,
.start = 0xa0,
.len = 12,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_CAP_ID_EXP,
.start = 0xac,
.len = 60,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_ERR | JAILHOUSE_PCI_EXT_CAP,
.start = 0x100,
.len = 4,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_DSN | JAILHOUSE_PCI_EXT_CAP,
.start = 0x13c,
.len = 4,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_PWR | JAILHOUSE_PCI_EXT_CAP,
.start = 0x150,
.len = 4,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_VC | JAILHOUSE_PCI_EXT_CAP,
.start = 0x160,
.len = 4,
.flags = 0,
},
/* PCIDevice: 16:01.0 */
/* PCIDevice: b2:00.0 */
{
.id = PCI_CAP_ID_SSVID,
.start = 0x40,
.len = 2,
.flags = 0,
},
{
.id = PCI_CAP_ID_MSI,
.start = 0x60,
.len = 20,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_CAP_ID_EXP,
.start = 0x90,
.len = 60,
.flags = 0,
},
{
.id = PCI_CAP_ID_PM,
.start = 0xe0,
.len = 8,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_EXT_CAP_ID_VNDR | JAILHOUSE_PCI_EXT_CAP,
.start = 0x100,
.len = 4,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_ACS | JAILHOUSE_PCI_EXT_CAP,
.start = 0x110,
.len = 4,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_ERR | JAILHOUSE_PCI_EXT_CAP,
.start = 0x148,
.len = 4,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_VNDR | JAILHOUSE_PCI_EXT_CAP,
.start = 0x1d0,
.len = 4,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_SECPCI | JAILHOUSE_PCI_EXT_CAP,
.start = 0x250,
.len = 4,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_VNDR | JAILHOUSE_PCI_EXT_CAP,
.start = 0x280,
.len = 4,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_VNDR | JAILHOUSE_PCI_EXT_CAP,
.start = 0x298,
.len = 4,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_VNDR | JAILHOUSE_PCI_EXT_CAP,
.start = 0x300,
.len = 4,
.flags = 0,
},
/* PCIDevice: 64:08.0 */
/* PCIDevice: 64:09.0 */
/* PCIDevice: 64:0a.0 */
/* PCIDevice: 64:0a.1 */
/* PCIDevice: 64:0a.2 */
/* PCIDevice: 64:0a.3 */
/* PCIDevice: 64:0a.4 */
/* PCIDevice: 64:0a.5 */
/* PCIDevice: 64:0a.6 */
/* PCIDevice: 64:0a.7 */
/* PCIDevice: 64:0b.0 */
/* PCIDevice: 64:0b.1 */
/* PCIDevice: 64:0b.2 */
/* PCIDevice: 64:0b.3 */
/* PCIDevice: 64:0c.0 */
/* PCIDevice: 64:0c.1 */
/* PCIDevice: 64:0c.2 */
/* PCIDevice: 64:0c.3 */
/* PCIDevice: 64:0c.4 */
/* PCIDevice: 64:0c.5 */
/* PCIDevice: 64:0c.6 */
/* PCIDevice: 64:0c.7 */
/* PCIDevice: 64:0d.0 */
/* PCIDevice: 64:0d.1 */
/* PCIDevice: 64:0d.2 */
/* PCIDevice: 64:0d.3 */
{
.id = PCI_CAP_ID_EXP,
.start = 0x40,
.len = 20,
.flags = 0,
},
{
.id = 0x0 | JAILHOUSE_PCI_EXT_CAP,
.start = 0x100,
.len = 4,
.flags = 0,
},
/* PCIDevice: b2:0e.1 */
/* PCIDevice: b2:0f.1 */
{
.id = PCI_CAP_ID_EXP,
.start = 0x40,
.len = 60,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_VNDR | JAILHOUSE_PCI_EXT_CAP,
.start = 0x100,
.len = 4,
.flags = 0,
},
/* PCIDevice: b3:00.0 */
{
.id = PCI_CAP_ID_PM,
.start = 0x50,
.len = 8,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_CAP_ID_EXP,
.start = 0x68,
.len = 60,
.flags = 0,
},
{
.id = PCI_CAP_ID_MSI,
.start = 0xa8,
.len = 24,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_CAP_ID_MSIX,
.start = 0xc0,
.len = 12,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_EXT_CAP_ID_ERR | JAILHOUSE_PCI_EXT_CAP,
.start = 0x100,
.len = 4,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_SECPCI | JAILHOUSE_PCI_EXT_CAP,
.start = 0x1e0,
.len = 4,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_PWR | JAILHOUSE_PCI_EXT_CAP,
.start = 0x1c0,
.len = 4,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_ARI | JAILHOUSE_PCI_EXT_CAP,
.start = 0x148,
.len = 4,
.flags = 0,
},
},
};
/* serial port mapping
* ttyS0 @0x3f8 (irq = 4)
* ttyS1 @0x2f8 (irq = 3)
* ttyS4 @0x20c0 (irq = 16)
* ttyS5 @0x20c8 (irq = 16)
* ttyS6 @0x40c0 (irq = 31)
* ttyS7 @0x40c8 (irq = 31)
*/
#define HYPERVISOR_BASE 0x100000000ULL /* @4GiB */
#define JAILHOUSE_RESERVED_SIZE 0x200000000ULL /* 8GiB */
#define JAILHOUSE_RESERVED_END (HYPERVISOR_BASE + JAILHOUSE_RESERVED_SIZE)
#define HYPERVISOR_SIZE 0x000600000ULL /* 6MiB */
#define HYPERVISOR_END (HYPERVISOR_BASE + HYPERVISOR_SIZE)
#define IVSHMEM_BASE HYPERVISOR_END
#define IVSHMEM_SIZE 0x100000ULL /* 1MiB */
#define INMATE_BASE (IVSHMEM_BASE + IVSHMEM_SIZE)
#define INMATE_SIZE (JAILHOUSE_RESERVED_END - INMATE_BASE) /* = 8GiB - 6MiB - 1MiB */
#define DACTALES_BASE INMATE_BASE
#define DACTALES_SIZE (512 * 1024 * 1024)
/*
* Jailhouse, a Linux-based partitioning hypervisor
*
* Configuration for Linux inmate, 1 CPU, 74 MB RAM, ~1MB shmem, serial ports
*
* Copyright (c) Siemens AG, 2013-2015
*
* Authors:
* Jan Kiszka <[email protected]>
*
* This work is licensed under the terms of the GNU GPL, version 2. See
* the COPYING file in the top-level directory.
*/
#include <jailhouse/types.h>
#include <jailhouse/cell-config.h>
#include "dell.h"
#define DACTALES_LOW_BASE DACTALES_BASE
#define DACTALES_LOW_SIZE 0x100000 /* 1MiB */
#define DACTALES_HIGH_BASE (DACTALES_LOW_BASE + DACTALES_LOW_SIZE)
#define DACTALES_HIGH_SIZE (DACTALES_SIZE - DACTALES_LOW_SIZE)
struct {
struct jailhouse_cell_desc cell;
__u64 cpus[1];
struct jailhouse_memory mem_regions[4];
struct jailhouse_cache cache_regions[0];
struct jailhouse_irqchip irqchips[1];
__u8 pio_bitmap[0x2000];
struct jailhouse_pci_device pci_devices[1];
struct jailhouse_pci_capability pci_caps[0];
} __attribute__((packed)) config = {
.cell = {
.signature = JAILHOUSE_CELL_DESC_SIGNATURE,
.revision = JAILHOUSE_CONFIG_REVISION,
.name = "dactales-linux",
.flags = JAILHOUSE_CELL_PASSIVE_COMMREG |
JAILHOUSE_CELL_VIRTUAL_CONSOLE_PERMITTED,
.cpu_set_size = sizeof(config.cpus),
.num_memory_regions = ARRAY_SIZE(config.mem_regions),
.num_cache_regions = ARRAY_SIZE(config.cache_regions),
.num_irqchips = ARRAY_SIZE(config.irqchips),
.pio_bitmap_size = ARRAY_SIZE(config.pio_bitmap),
.num_pci_devices = ARRAY_SIZE(config.pci_devices),
.num_pci_caps = ARRAY_SIZE(config.pci_caps),
},
.cpus = {
0x8,
},
.mem_regions = {
/* low RAM */ {
.phys_start = DACTALES_LOW_BASE,
.virt_start = 0,
.size = DACTALES_LOW_SIZE,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA |
JAILHOUSE_MEM_LOADABLE,
},
/* communication region */ {
.virt_start = 0x00100000,
.size = 0x00001000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_COMM_REGION,
},
/* high RAM */ {
.phys_start = DACTALES_HIGH_BASE,
.virt_start = 0x00200000,
.size = DACTALES_HIGH_SIZE,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA |
JAILHOUSE_MEM_LOADABLE,
},
/* IVSHMEM shared memory region */
{
.phys_start = IVSHMEM_BASE,
.virt_start = IVSHMEM_BASE,
.size = IVSHMEM_SIZE,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_ROOTSHARED,
},
},
.cache_regions = {
#if 0
{
.start = 0,
.size = 2,
.type = JAILHOUSE_CACHE_L3,
},
#endif
},
.irqchips = {
/* IOAPIC */ {
.address = 0xfec00000,
.id = 0x3f0f8,
.pin_bitmap = {
(1 << 4),
},
},
},
.pio_bitmap = {
[ 0/8 ... 0x3f7/8] = -1,
[ 0x3f8/8 ... 0x3ff/8] = 0,
[ 0x400/8 ...0xffff/8] = -1,
},
.pci_devices = {
{
.type = JAILHOUSE_PCI_TYPE_IVSHMEM,
.domain = 0x0,
.bdf = 0x08,
.bar_mask = {
0xffffff00, 0xffffffff, 0x00000000,
0x00000000, 0xffffffe0, 0xffffffff,
},
.num_msix_vectors = 1,
.shmem_region = 3,
.shmem_protocol = JAILHOUSE_SHMEM_PROTO_VETH,
},
},
.pci_caps = {
}
};
