>
> Your kernel is now accessing a device that is not configured in the
> original
> bananapi.cell, likely because that config was for a classic banana pi,
> yours is
> an M1. Adjust the config, adding at least a region to cover the 0x100
> bytes at
> 0x01c25000, and things should work better.
>
I've modified the configuration file for the banana pi cell, covering both
addresses by adding the following memory regions:
/* HDMI */ {
.phys_start = 0x01c16000,
.virt_start = 0x01c16000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
}
and
/* RTP */ {
.phys_start = 0x01c25000,
.virt_start = 0x01c25000,
.size = 0x100,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO | JAILHOUSE_MEM_IO_32,
}
This seems to solve the unhandled traps; however, when I try to create
the banana-gic-demo cell (by running "./jailhouse cell create
../configs/arm/bananapi-gic-demo.cell"), another trap appears:
Unhandled data read at 0x1c20060(4)
FATAL: unhandled trap (exception class 0x24)
pc=0xc03f45e8 cpsr=0x60010093 hsr=0x93870007
r0=0x20010093 r1=0x00000191 r2=0x00000060 r3=0xe0009060
r4=0xc0b2b558 r5=0x00000100 r6=0x20010093 r7=0x00000000
r8=0x00000004 r9=0xde22c000 r10=0xc0b04c48 r11=0xde0ddc00
r12=0x00000000 r13=0xde22dc98 r14=0xc03f45d8
Parking CPU 0 (Cell: "Banana-Pi")
According to /proc/iomem, this is related to the clock. I've tried to
modify the config files, by commenting the console configuration of
gic-demo cell:
.clock_reg = 0x01c2006c,
.gate_nr = 23,
.divider = 0x0d,
I got the following trap:
Unhandled data read at 0x1c20088(4)
FATAL: unhandled trap (exception class 0x24)
pc=0xc03f457c cpsr=0x60010093 hsr=0x93850007
r0=0xa0010093 r1=0x00000195 r2=0x00000088 r3=0xe0009088
r4=0xc0b2a3dc r5=0xde817cc0 r6=0xa0010093 r7=0x80000000
r8=0xde24a000 r9=0xc0b04c48 r10=0x00000008 r11=0xdf054880
r12=0x00000000 r13=0xde24be68 r14=0xc03f456c
Parking CPU 0 (Cell: "Banana-Pi")
How can I solve this trap?
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/*
* Jailhouse, a Linux-based partitioning hypervisor
*
* Configuration for gic-demo inmate on Banana Pi:
* 1 CPU, 64K RAM, serial ports 4-7, CCU+GPIO
*
* Copyright (c) Siemens AG, 2014
*
* Authors:
* Jan Kiszka <[email protected]>
*
* This work is licensed under the terms of the GNU GPL, version 2. See
* the COPYING file in the top-level directory.
*/
#include <jailhouse/types.h>
#include <jailhouse/cell-config.h>
struct {
struct jailhouse_cell_desc cell;
__u64 cpus[1];
struct jailhouse_memory mem_regions[5];
} __attribute__((packed)) config = {
.cell = {
.signature = JAILHOUSE_CELL_DESC_SIGNATURE,
.revision = JAILHOUSE_CONFIG_REVISION,
.name = "bananapi-gic-demo",
.flags = JAILHOUSE_CELL_PASSIVE_COMMREG,
.cpu_set_size = sizeof(config.cpus),
.num_memory_regions = ARRAY_SIZE(config.mem_regions),
.console = {
.address = 0x01c29c00,
.clock_reg = 0x01c2006c,
.gate_nr = 23,
.divider = 0x0d,
.type = JAILHOUSE_CON_TYPE_8250,
.flags = JAILHOUSE_CON_ACCESS_MMIO |
JAILHOUSE_CON_REGDIST_4,
},
},
.cpus = {
0x2,
},
.mem_regions = {
/* CCU */ {
.phys_start = 0x01c20000,
.virt_start = 0x01c20000,
.size = 0x400,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO | JAILHOUSE_MEM_IO_32,
},
/* GPIO: port H */ {
.phys_start = 0x01c208fc,
.virt_start = 0x01c208fc,
.size = 0x24,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO | JAILHOUSE_MEM_IO_32,
},
/* UART 4-7 */ {
.phys_start = 0x01c29000,
.virt_start = 0x01c29000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* RAM */ {
.phys_start = 0x7bfe0000,
.virt_start = 0,
.size = 0x00010000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE,
},
/* communication region */ {
.virt_start = 0x80000000,
.size = 0x00001000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_COMM_REGION,
},
},
};
/*
* Jailhouse, a Linux-based partitioning hypervisor
*
* Test configuration for Banana Pi board (A20 dual-core Cortex-A7, 1G RAM)
*
* Copyright (c) Siemens AG, 2014
*
* Authors:
* Jan Kiszka <[email protected]>
*
* This work is licensed under the terms of the GNU GPL, version 2. See
* the COPYING file in the top-level directory.
*/
#include <jailhouse/types.h>
#include <jailhouse/cell-config.h>
struct {
struct jailhouse_system header;
__u64 cpus[1];
struct jailhouse_memory mem_regions[23];
struct jailhouse_irqchip irqchips[1];
struct jailhouse_pci_device pci_devices[1];
} __attribute__((packed)) config = {
.header = {
.signature = JAILHOUSE_SYSTEM_SIGNATURE,
.revision = JAILHOUSE_CONFIG_REVISION,
.flags = JAILHOUSE_SYS_VIRTUAL_DEBUG_CONSOLE,
.hypervisor_memory = {
.phys_start = 0x7c000000,
.size = 0x4000000,
},
.debug_console = {
.address = 0x01c28000,
.size = 0x1000,
/* .clock_reg = 0x01c2006c, */
/* .gate_nr = 16 */
/* .divider = 0x0d, */
.type = JAILHOUSE_CON_TYPE_8250,
.flags = JAILHOUSE_CON_ACCESS_MMIO |
JAILHOUSE_CON_REGDIST_4,
},
.platform_info = {
.pci_mmconfig_base = 0x2000000,
.pci_mmconfig_end_bus = 0,
.pci_is_virtual = 1,
.arm = {
.gic_version = 2,
.gicd_base = 0x01c81000,
.gicc_base = 0x01c82000,
.gich_base = 0x01c84000,
.gicv_base = 0x01c86000,
.maintenance_irq = 25,
},
},
.root_cell = {
.name = "Banana-Pi",
.cpu_set_size = sizeof(config.cpus),
.num_memory_regions = ARRAY_SIZE(config.mem_regions),
.num_irqchips = ARRAY_SIZE(config.irqchips),
.num_pci_devices = ARRAY_SIZE(config.pci_devices),
.vpci_irq_base = 108,
},
},
.cpus = {
0x3,
},
.mem_regions = {
/* SPI */ {
.phys_start = 0x01c05000,
.virt_start = 0x01c05000,
.size = 0x00001000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* MMC */ {
.phys_start = 0x01c0f000,
.virt_start = 0x01c0f000,
.size = 0x00001000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* USB + PMU1 */ {
.phys_start = 0x01c14000,
.virt_start = 0x01c14000,
.size = 0x00001000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* HDMI */ {
.phys_start = 0x01c16000,
.virt_start = 0x01c16000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* SATA */ {
.phys_start = 0x01c18000,
.virt_start = 0x01c18000,
.size = 0x00001000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* USB + PMU2 */ {
.phys_start = 0x01c1c000,
.virt_start = 0x01c1c000,
.size = 0x00001000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* CCU */ {
.phys_start = 0x01c20000,
.virt_start = 0x01c20000,
.size = 0x400,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO | JAILHOUSE_MEM_IO_32,
},
/* Ints */ {
.phys_start = 0x01c20400,
.virt_start = 0x01c20400,
.size = 0x400,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO | JAILHOUSE_MEM_IO_32,
},
/* GPIO: ports A-G */ {
.phys_start = 0x01c20800,
.virt_start = 0x01c20800,
.size = 0xfc,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO | JAILHOUSE_MEM_IO_32,
},
/* GPIO: port H */ {
.phys_start = 0x01c208fc,
.virt_start = 0x01c208fc,
.size = 0x24,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO | JAILHOUSE_MEM_IO_32,
},
/* GPIO: port I */ {
.phys_start = 0x01c20920,
.virt_start = 0x01c20920,
.size = 0x24,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO | JAILHOUSE_MEM_IO_32,
},
/* GPIO: intr config */ {
.phys_start = 0x01c20a00,
.virt_start = 0x01c20a00,
.size = 0x1c,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO | JAILHOUSE_MEM_IO_32,
},
/* Timer */ {
.phys_start = 0x01c20c00,
.virt_start = 0x01c20c00,
.size = 0x400,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO | JAILHOUSE_MEM_IO_32,
},
/* RTP */ {
.phys_start = 0x01c25000,
.virt_start = 0x01c25000,
.size = 0x100,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO | JAILHOUSE_MEM_IO_32,
},
/* UART0-3 */ {
.phys_start = 0x01c28000,
.virt_start = 0x01c28000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* UART4-7 */ {
.phys_start = 0x01c29000,
.virt_start = 0x01c29000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* GMAC */ {
.phys_start = 0x01c50000,
.virt_start = 0x01c50000,
.size = 0x00010000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* HSTIMER */ {
.phys_start = 0x01c60000,
.virt_start = 0x01c60000,
.size = 0x00001000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* RAM */ {
.phys_start = 0x40000000,
.virt_start = 0x40000000,
.size = 0x3bf00000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE,
},
/* IVSHMEM shared memory regions */ {
.phys_start = 0x7bf00000,
.virt_start = 0x7bf00000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ,
},
{ 0 },
{
.phys_start = 0x7bf01000,
.virt_start = 0x7bf01000,
.size = 0x7f000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
{
.phys_start = 0x7bf80000,
.virt_start = 0x7bf80000,
.size = 0x7f000,
.flags = JAILHOUSE_MEM_READ,
},
},
.irqchips = {
/* GIC */ {
.address = 0x01c81000,
.pin_base = 32,
.pin_bitmap = {
0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
},
},
},
.pci_devices = {
{
.type = JAILHOUSE_PCI_TYPE_IVSHMEM,
.bdf = 0x00,
.bar_mask = {
0xfffff000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.shmem_regions_start = 18,
.shmem_dev_id = 0,
.shmem_peers = 2,
.shmem_protocol = JAILHOUSE_SHMEM_PROTO_UNDEFINED,
},
},
};
