On 23.11.19 16:00, Felix Schwer wrote:
Hello everybody,
I'm currently trying to extend the IVSHMEM demo for imx8mm
(_https://source.codeaurora.org/external/imx/imx-jailhouse/tree/configs/arm64?h=imx_4.14.78_1.0.0_ga_
<https://source.codeaurora.org/external/imx/imx-jailhouse/tree/configs/arm64?h=imx_4.14.98_2.2.0>)
to allow for access to GPIO banks.
I added the corresponding memory regions in the cell config…
/* gpio3 */{
.phys_start = 0x30220000,
.virt_start = 0x30220000,
.size = 0x10000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO | JAILHOUSE_MEM_IO_32,
You only need JAILHOUSE_MEM_IO_<size> when defining a sub-page, i.e.
something smaller than 4K. It's a nop here, though.
},
/* gpio5 */{
.phys_start = 0x30240000,
.virt_start = 0x30240000,
.size = 0x10000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO | JAILHOUSE_MEM_IO_32,
},
…
I also removed this memory sections from the root cell config:
…
/* IO */ {
.phys_start = 0x00000000,
.virt_start = 0x00000000,
.size = 0x30220000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* IO */ {
.phys_start = 0x30250000,
.virt_start = 0x30250000,
.size = 0x0FDB0000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
…
Also, I disabled the corresponding GPIOS in the fsl-imx8mm-evk-root.dts
And reserved the memory sections.
…
&gpio3 {
/* Disable gpio3 */
status = "disabled";
};
&gpio5 {
/* Disable gpio5*/
status = "disabled";
};
&{/reserved-memory} {
gpio3_reserved: gpio@0x30220000 {
no-map;
reg = <0 0x30220000 0x0 0x10000>;
};
gpio5_reserved: gpio@0x30240000 {
no-map;
reg = <0 0x30240000 0x0 0x10000>;
};
…
The cell boots correctly and the inmate is starting and running.
Accessing the GPIOs via the gpiochips in Linux worked (before removing
them from the .dts)
When I access the memory via mmio_write32(…) …
mmio_write32(((*void* *)(*unsigned* *long*)(0x30240000)),0xFFFFFFFF);
or mmio_read32(…) in the inmate freezes without any message.
Am I missing out on something? Are there any specialties or other
configurations I have to consider when accessing GPIOs from the cell side?
Likely, you are missing map_range(<phys-addr>, <size>) in the inmate.
Those have their MMU enabled but only id-map the first 64K and a
potential UART.
Jan
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