I have attached jetson-tx2.c and serial console output that is obtained after jailhouse enable command.
On Wednesday, January 29, 2020 at 12:06:48 PM UTC-6, Jan Kiszka wrote: > > On 29.01.20 18:04, Saroj Sapkota wrote: > > I changed the extlinux as suggested by Henning schild, as > > attached file: > > and rebooted the system and checked the following: > > printenv gives: > > tx2@tx2 $ sudo printenv > > [sudo] password for tx2: > > > LS_COLORS=rs=0:di=01;34:ln=01;36:mh=00:pi=40;33:so=01;35:do=01;35:bd=40;33;01:cd=40;33;01:or=40;31;01:mi=00:su=37;41:sg=30;43:ca=30;41:tw=30;42:ow=34;42:st=37;44:ex=01;32:*.tar=01;31:*.tgz=01;31:*.arc=01;31:*.arj=01;31:*.taz=01;31:*.lha=01;31:*.lz4=01;31:*.lzh=01;31:*.lzma=01;31:*.tlz=01;31:*.txz=01;31:*.tzo=01;31:*.t7z=01;31:*.zip=01;31:*.z=01;31:*.Z=01;31:*.dz=01;31:*.gz=01;31:*.lrz=01;31:*.lz=01;31:*.lzo=01;31:*.xz=01;31:*.zst=01;31:*.tzst=01;31:*.bz2=01;31:*.bz=01;31:*.tbz=01;31:*.tbz2=01;31:*.tz=01;31:*.deb=01;31:*.rpm=01;31:*.jar=01;31:*.war=01;31:*.ear=01;31:*.sar=01;31:*.rar=01;31:*.alz=01;31:*.ace=01;31:*.zoo=01;31:*.cpio=01;31:*.7z=01;31:*.rz=01;31:*.cab=01;31:*.wim=01;31:*.swm=01;31:*.dwm=01;31:*.esd=01;31:*.jpg=01;35:*.jpeg=01;35:*.mjpg=01;35:*.mjpeg=01;35:*.gif=01;35:*.bmp=01;35:*.pbm=01;35:*.pgm=01;35:*.ppm=01;35:*.tga=01;35:*.xbm=01;35:*.xpm=01;35:*.tif=01;35:*.tiff=01;35:*.png=01;35:*.svg=01;35:*.svgz=01;35:*.mng=01;35:*.pcx=01;35:*.mov=01;35:*.mpg=01;35:*.mpeg=01;35:*.m2v=01;35:*.mkv=01;35:*.webm=01;35:*.ogm=01;35:*.mp4=01;35:*.m4v=01;35:*.mp4v=01;35:*.vob=01;35:*.qt=01;35:*.nuv=01;35:*.wmv=01;35:*.asf=01;35:*.rm=01;35:*.rmvb=01;35:*.flc=01;35:*.avi=01;35:*.fli=01;35:*.flv=01;35:*.gl=01;35:*.dl=01;35:*.xcf=01;35:*.xwd=01;35:*.yuv=01;35:*.cgm=01;35:*.emf=01;35:*.ogv=01;35:*.ogx=01;35:*.aac=00;36:*.au=00;36:*.flac=00;36:*.m4a=00;36:*.mid=00;36:*.midi=00;36:*.mka=00;36:*.mp3=00;36:*.mpc=00;36:*.ogg=00;36:*.ra=00;36:*.wav=00;36:*.oga=00;36:*.opus=00;36:*.spx=00;36:*.xspf=00;36: > > > > LANG=en_US.UTF-8 > > HOME=/home/tx2 > > TERM=xterm-256color > > > PATH=/usr/local/sbin:/usr/local/bin:/usr/sbin:/usr/bin:/sbin:/bin:/snap/bin > > MAIL=/var/mail/root > > LOGNAME=root > > USER=root > > USERNAME=root > > SHELL=/bin/bash > > SUDO_COMMAND=/usr/bin/printenv > > SUDO_USER=tx2 > > SUDO_UID=1000 > > SUDO_GID=1000 > > Similarly output of cat /proc/cmdline is : > > root=/dev/mmcblk0p1 rw rootwait rootfstype=ext4 console=ttyS0,115200n8 > > console=tty0 fbcon=map:0 net.ifnames=0 video=tegrafb > > no_console_suspend=1 earlycon=uart8250,mmio32,0x3100000 > > nvdumper_reserved=0x2772e0000 gpt tegra_fbmem2=0x140000@0x9607d000 > > lut_mem2=0x2008@0x9607a000 usbcore.old_scheme_first=1 tegraid=18.1.2.0.0 > > maxcpus=6 boot.slot_suffix= boot.ratchetvalues=0.2031647.1 > > bl_prof_dataptr=0x10000@0x275840000 sdhci_tegra.en_boot_part_access=1 > > quiet mem=7808M vmalloc=512M > > > > when i again tried to enable jailhouse through command sudo jailhouse > > enable Downloads/linux-jetson/configs/arm64/jetson-tx2.cell > > terminal cell hangs and debug cell gives following output: > > We need the output on the serial console configured in jetson-tx2.c as > Jailhouse debug channel. > > Jan > > -- > Siemens AG, Corporate Technology, CT RDA IOT SES-DE > Corporate Competence Center Embedded Linux > -- You received this message because you are subscribed to the Google Groups "Jailhouse" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. To view this discussion on the web visit https://groups.google.com/d/msgid/jailhouse-dev/3f267078-10bf-4a5c-86df-9a2cf0d4abd4%40googlegroups.com.
serialconsole_output
Description: Binary data
/* * Jailhouse, a Linux-based partitioning hypervisor * * Configuration for Jailhouse Jetson TX2 board * * Copyright (C) 2018 Evidence Srl * * Authors: * Claudio Scordino <[email protected]> * * This work is licensed under the terms of the GNU GPL, version 2. See * the COPYING file in the top-level directory. * * NOTE: Add "mem=7808M vmalloc=512M" to the kernel command line. * * 2:7000:0000 inmate (size: 100:0000 = 16 MB) * 2:7100:0000 hypervisor (size: 400:0000 = 64 MB) * */ #include <jailhouse/types.h> #include <jailhouse/cell-config.h> #define ARRAY_SIZE(a) (sizeof(a) / sizeof(a[0])) struct { struct jailhouse_system header; __u64 cpus[1]; struct jailhouse_memory mem_regions[66]; struct jailhouse_irqchip irqchips[3]; struct jailhouse_pci_device pci_devices[2]; } __attribute__((packed)) config = { .header = { .signature = JAILHOUSE_SYSTEM_SIGNATURE, .revision = JAILHOUSE_CONFIG_REVISION, .hypervisor_memory = { .phys_start = 0x271000000, .size = 0x4000000, }, .debug_console = { .address = 0x3100000, .size = 0x10000, .flags = JAILHOUSE_CON1_TYPE_8250 | JAILHOUSE_CON1_ACCESS_MMIO | JAILHOUSE_CON1_REGDIST_4 | JAILHOUSE_CON2_TYPE_ROOTPAGE, }, .platform_info = { /* .pci_mmconfig_base is fixed; if you change it, update the value in inmates/lib/arm-common/pci.c (PCI_CFG_BASE) and regenerate the inmate library*/ .pci_mmconfig_base = 0x40000000, .pci_mmconfig_end_bus = 0x0, .pci_is_virtual = 1, .arm = { .gicd_base = 0x03881000, .gicc_base = 0x03882000, .gich_base = 0x03884000, .gicv_base = 0x03886000, .gic_version = 2, .maintenance_irq = 25, } }, .root_cell = { .name = "Jetson-TX2", .cpu_set_size = sizeof(config.cpus), .num_memory_regions = ARRAY_SIZE(config.mem_regions), .num_pci_devices = ARRAY_SIZE(config.pci_devices), .num_irqchips = ARRAY_SIZE(config.irqchips), .vpci_irq_base = 288, }, }, .cpus = { 0x39, }, .mem_regions = { /* BPMP_ATCM */ { .phys_start = 0x00000000, .virt_start = 0x00000000, .size = 0x40000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* MISC */ { .phys_start = 0x00100000, .virt_start = 0x00100000, .size = 0x10000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* AXIP2P */ { .phys_start = 0x02100000, .virt_start = 0x02100000, .size = 0x100000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* GPIO_CTL */ { .phys_start = 0x02200000, .virt_start = 0x02200000, .size = 0x100000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* AXI2APB */ { .phys_start = 0x02300000, .virt_start = 0x02300000, .size = 0x100000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* TSA */ { .phys_start = 0x2400000, .virt_start = 0x2400000, .size = 0x20000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* PADCTL_A (PINMUX) */ { .phys_start = 0x02430000, .virt_start = 0x02430000, .size = 0x15000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* UFSHC */ { .phys_start = 0x02450000, .virt_start = 0x02450000, .size = 0x20000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* ETHER_QOS */ { .phys_start = 0x02490000, .virt_start = 0x02490000, .size = 0x50000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* GPCDMA */ { .phys_start = 0x02600000, .virt_start = 0x02600000, .size = 0x210000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* APE */ { .phys_start = 0x02900000, .virt_start = 0x02900000, .size = 0x200000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* MSS */ { .phys_start = 0x02c00000, .virt_start = 0x02c00000, .size = 0xb0000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* LIC */ { .phys_start = 0x03000000, .virt_start = 0x03000000, .size = 0x10000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* TOP_TKE */ { .phys_start = 0x03010000, .virt_start = 0x03010000, .size = 0xe0000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* TIMER */ { .phys_start = 0x03020000, .virt_start = 0x03020000, .size = 0xa0000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* UARTA */ { .phys_start = 0x03100000, .virt_start = 0x03100000, .size = 0x10000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* UART-B */ { .phys_start = 0x03110000, .virt_start = 0x03110000, .size = 0x10000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* I2C */ { .phys_start = 0x03160000, .virt_start = 0x03160000, .size = 0x90000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* PWM1 + PWM2 */ { .phys_start = 0x03280000, .virt_start = 0x03280000, .size = 0x20000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* PWM3 - PWM8 */ { .phys_start = 0x032a0000, .virt_start = 0x032a0000, .size = 0x60000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* SDMMC */ { .phys_start = 0x3400000, .virt_start = 0x3400000, .size = 0x80000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* SATA */ { .phys_start = 0x3500000, .virt_start = 0x3500000, .size = 0x10000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* HDA */ { .phys_start = 0x3510000, .virt_start = 0x3510000, .size = 0x10000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* XUSB_PADCTL + XUSB_HOST */ { .phys_start = 0x3520000, .virt_start = 0x3520000, .size = 0x20000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* XUSB */ { .phys_start = 0x03540000, .virt_start = 0x03540000, .size = 0x20000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* FUSE + KFUSE */ { .phys_start = 0x03820000, .virt_start = 0x03820000, .size = 0x40000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* MIPICAL */ { .phys_start = 0x03990000, .virt_start = 0x03990000, .size = 0x10000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* TACH_0 */ { .phys_start = 0x039c0000, .virt_start = 0x039c0000, .size = 0x10000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* SE0 */ { .phys_start = 0x03ac0000, .virt_start = 0x03ac0000, .size = 0x30000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* TOP0_HSP */{ .phys_start = 0x03c00000, .virt_start = 0x03c00000, .size = 0xa0000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* VIC CAR */{ .phys_start = 0x05560000, .virt_start = 0x05560000, .size = 0x10000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* CSITE */ { .phys_start = 0x08000000, .virt_start = 0x08000000, .size = 0x2000000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* SCE VIC registers */ { .phys_start = 0x0b020000, .virt_start = 0x0b020000, .size = 0x20000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* SCE_PM */ { .phys_start = 0x0b1f0000, .virt_start = 0x0b1f0000, .size = 0x40000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* SCE_CFG */ { .phys_start = 0x0b230000, .virt_start = 0x0b230000, .size = 0x10000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* AON VIC registers */ { .phys_start = 0x0c020000, .virt_start = 0x0c020000, .size = 0x20000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* More I2C + SPI2 */ { .phys_start = 0x0c230000, .virt_start = 0x0c230000, .size = 0x40000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* UARTC, UARTG, RTC, TSC */ { .phys_start = 0x0c280000, .virt_start = 0x0c280000, .size = 0x70000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* AON_GPIO_0 */ { .phys_start = 0x0c2f0000, .virt_start = 0x0c2f0000, .size = 0x10000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* AON_PADCTL_0 (PINMUX) */ { .phys_start = 0x0c300000, .virt_start = 0x0c300000, .size = 0x10000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /*CAN 1, CAN2 */ { .phys_start = 0x0c310000, .virt_start = 0x0c310000, .size = 0x20000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /*PWM4 (FAN) */ { .phys_start = 0x0c340000, .virt_start = 0x0c340000, .size = 0x10000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* PMC */ { .phys_start = 0x0c360000, .virt_start = 0x0c360000, .size = 0x40000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* BPMP VIC registers */ { .phys_start = 0x0d020000, .virt_start = 0x0d020000, .size = 0x20000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* ACTMON + SIMON + SOC_THERM */ { .phys_start = 0x0d230000, .virt_start = 0x0d230000, .size = 0x70000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /*CCPLEX CLUSTER*/{ .phys_start = 0x0e000000, .virt_start = 0x0e000000, .size = 0x400000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* PCIE0 */ { .phys_start = 0x10000000, .virt_start = 0x10000000, .size = 0x1000000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* SMMU0 */ { .phys_start = 0x12000000, .virt_start = 0x12000000, .size = 0x1000000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* HOST1X */ { .phys_start = 0x13e00000, .virt_start = 0x13e00000, .size = 0x90000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* HOST1X_ACTMON */ { .phys_start = 0x13ec0000, .virt_start = 0x13ec0000, .size = 0x50000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* DPAUX1 */ { .phys_start = 0x15040000, .virt_start = 0x15040000, .size = 0x40000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* NVCSI */ { .phys_start = 0x150c0000, .virt_start = 0x150c0000, .size = 0x40000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* TSECB */ { .phys_start = 0x15100000, .virt_start = 0x15100000, .size = 0x40000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* NVDISPLAY */ { .phys_start = 0x15200000, .virt_start = 0x15200000, .size = 0x40000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* VIC */ { .phys_start = 0x15340000, .virt_start = 0x15340000, .size = 0x40000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* NVJPG */ { .phys_start = 0x15380000, .virt_start = 0x15380000, .size = 0x40000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* NVDEC + NVENC + TSEC + ISP + SOR */ { .phys_start = 0x15480000, .virt_start = 0x15480000, .size = 0x1c0000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* NI */ { .phys_start = 0x15700000, .virt_start = 0x15700000, .size = 0x100000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* SE1-SE4 */ { .phys_start = 0x15810000, .virt_start = 0x15810000, .size = 0x40000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* GPU */ { .phys_start = 0x17000000, .virt_start = 0x17000000, .size = 0x9000000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* SYSRAM_0 */{ .phys_start = 0x30000000, .virt_start = 0x30000000, .size = 0x10000000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* System RAM */ { .phys_start = 0x80000000, .virt_start = 0x80000000, .size = 0x1F0000000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* Inmate */ { .phys_start = 0x270000000, .virt_start = 0x270000000, .size = 0x1000000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* Persistent RAM */ { .phys_start = 0x277080000, .virt_start = 0x277080000, .size = 0x200000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* IVHSMEM 1*/ { .phys_start = 0x275000000, .virt_start = 0x275000000, .size = 0x1000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE , }, /* IVHSMEM 2*/ { .phys_start = 0x275200000, .virt_start = 0x275200000, .size = 0x1000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE , }, }, .irqchips = { /* GIC */ { .address = 0x03881000, .pin_base = 32, .pin_bitmap = { 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff }, }, /* GIC */ { .address = 0x03881000, .pin_base = 160, .pin_bitmap = { 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff }, }, /* GIC */ { .address = 0x03881000, .pin_base = 288, .pin_bitmap = { 0xffffffff, 0xffffffff, 0xffffffff }, }, }, .pci_devices = { { .type = JAILHOUSE_PCI_TYPE_IVSHMEM, .bdf = 0x0 << 3, .bar_mask = { 0xffffff00, 0xffffffff, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }, /*num_msix_vectors needs to be 0 for INTx operation*/ .num_msix_vectors = 0, .shmem_region = 64, .shmem_protocol = JAILHOUSE_SHMEM_PROTO_UNDEFINED, .domain = 0x0, }, { .type = JAILHOUSE_PCI_TYPE_IVSHMEM, .bdf = 0xf << 3, .bar_mask = { 0xffffff00, 0xffffffff, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }, /*num_msix_vectors needs to be 0 for INTx operation*/ .num_msix_vectors = 0, .shmem_region = 65, .shmem_protocol = JAILHOUSE_SHMEM_PROTO_UNDEFINED, .domain = 0x0, }, }, };
