Add Linux demo with 2 CPUs and 128M RAM for Pine64+. Signed-off-by: Vijai Kumar K <[email protected]> --- configs/arm64/dts/inmate-pine64-plus.dts | 114 +++++++++++++++++ configs/arm64/pine64-plus-linux-demo.c | 149 +++++++++++++++++++++++ 2 files changed, 263 insertions(+) create mode 100644 configs/arm64/dts/inmate-pine64-plus.dts create mode 100644 configs/arm64/pine64-plus-linux-demo.c
diff --git a/configs/arm64/dts/inmate-pine64-plus.dts b/configs/arm64/dts/inmate-pine64-plus.dts new file mode 100644 index 00000000..0f980c98 --- /dev/null +++ b/configs/arm64/dts/inmate-pine64-plus.dts @@ -0,0 +1,114 @@ +/* + * Jailhouse, a Linux-based partitioning hypervisor + * + * Device tree for Linux inmate test on Pine64+ board, + * corresponds to configs/arm64/pine64-plus-linux-demo.c + * + * Copyright (c) Vijai Kumar K, 2019-2020 + * + * Authors: + * Vijai Kumar K <[email protected]> + * + * This work is licensed under the terms of the GNU GPL, version 2. See + * the COPYING file in the top-level directory. + */ + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/dts-v1/; + +/ { + model = "Jailhouse cell on Pine64+"; + + #address-cells = <1>; + #size-cells = <1>; + + interrupt-parent = <&gic>; + + hypervisor { + compatible = "jailhouse,cell"; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@2 { + compatible = "arm,cortex-a53"; + device_type = "cpu"; + reg = <2>; + enable-method = "psci"; + }; + + cpu@3 { + compatible = "arm,cortex-a53"; + device_type = "cpu"; + reg = <3>; + enable-method = "psci"; + }; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = <GIC_PPI 13 + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 14 + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 11 + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 10 + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; + }; + + clocks { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + osc24M: clk24M { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <24000000>; + clock-output-names = "osc24M"; + }; + }; + + gic: interrupt-controller@01c81000 { + compatible = "arm,gic-400"; + reg = <0x01c81000 0x1000>, + <0x01c82000 0x2000>; + interrupt-controller; + #interrupt-cells = <3>; + }; + + uart: serial@01c28000 { + compatible = "snps,dw-apb-uart"; + reg = <0x01c28000 0x400>; + interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>; + reg-shift = <2>; + reg-io-width = <4>; + clock-frequency = <24000000>; + }; + + pci@02000000 { + compatible = "pci-host-ecam-generic"; + device_type = "pci"; + bus-range = <0 0>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &gic GIC_SPI 123 IRQ_TYPE_EDGE_RISING>, + <0 0 0 2 &gic GIC_SPI 124 IRQ_TYPE_EDGE_RISING>, + <0 0 0 3 &gic GIC_SPI 125 IRQ_TYPE_EDGE_RISING>, + <0 0 0 4 &gic GIC_SPI 126 IRQ_TYPE_EDGE_RISING>; + reg = <0x02000000 0x100000>; + ranges = + <0x02000000 0x00 0x10000000 0x10000000 0x00 0x10000>; + }; +}; diff --git a/configs/arm64/pine64-plus-linux-demo.c b/configs/arm64/pine64-plus-linux-demo.c new file mode 100644 index 00000000..55f59b35 --- /dev/null +++ b/configs/arm64/pine64-plus-linux-demo.c @@ -0,0 +1,149 @@ +/* + * Jailhouse, a Linux-based partitioning hypervisor + * + * Configuration for linux-demo inmate on Pine64+ board: + * 2 CPU, 128M RAM, serial port 0 + * + * Copyright (c) Vijai Kumar K, 2019-2020 + * + * Authors: + * Vijai Kumar K <[email protected]> + * + * This work is licensed under the terms of the GNU GPL, version 2. See + * the COPYING file in the top-level directory. + */ + +#include <jailhouse/types.h> +#include <jailhouse/cell-config.h> + +struct { + struct jailhouse_cell_desc cell; + __u64 cpus[1]; + struct jailhouse_memory mem_regions[13]; + struct jailhouse_irqchip irqchips[1]; + struct jailhouse_pci_device pci_devices[2]; +} __attribute__((packed)) config = { + .cell = { + .signature = JAILHOUSE_CELL_DESC_SIGNATURE, + .revision = JAILHOUSE_CONFIG_REVISION, + .name = "pine64-plus-linux-demo", + .flags = JAILHOUSE_CELL_PASSIVE_COMMREG | + JAILHOUSE_CELL_VIRTUAL_CONSOLE_PERMITTED, + + .cpu_set_size = sizeof(config.cpus), + .num_memory_regions = ARRAY_SIZE(config.mem_regions), + .num_irqchips = ARRAY_SIZE(config.irqchips), + .num_pci_devices = ARRAY_SIZE(config.pci_devices), + + .vpci_irq_base = 123, + + .console = { + .address = 0x01c28000, + .type = JAILHOUSE_CON_TYPE_8250, + .flags = JAILHOUSE_CON_ACCESS_MMIO | + JAILHOUSE_CON_REGDIST_4, + }, + }, + + .cpus = { + 0xc, + }, + + .mem_regions = { + /* IVSHMEM shared memory regions for 00:00.0 (demo) */ + /* State Table */ { + .phys_start = 0xbbef1000, + .virt_start = 0xbbef1000, + .size = 0x1000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED, + }, + /* Read/Write Section */ { + .phys_start = 0xbbef2000, + .virt_start = 0xbbef2000, + .size = 0x9000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_ROOTSHARED, + }, + /* Output (peer 0) */ { + .phys_start = 0xbbefb000, + .virt_start = 0xbbefb000, + .size = 0x2000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED, + }, + /* Output (peer 1) */ { + .phys_start = 0xbbefd000, + .virt_start = 0xbbefd000, + .size = 0x2000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED, + }, + /* Output (peer 2) */ { + .phys_start = 0xbbeff000, + .virt_start = 0xbbeff000, + .size = 0x2000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_ROOTSHARED, + }, + /* IVSHMEM shared memory region */ + JAILHOUSE_SHMEM_NET_REGIONS(0xbbf01000, 1), + /* UART 0-3 */ { + .phys_start = 0x01c28000, + .virt_start = 0x01c28000, + .size = 0x1000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO | JAILHOUSE_MEM_ROOTSHARED, + }, + /* RAM */ { + .phys_start = 0xbb900000, + .virt_start = 0, + .size = 0x10000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE, + }, + /* RAM */ { + .phys_start = 0xb0000000, + .virt_start = 0xb0000000, + .size = 0x8000000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA | + JAILHOUSE_MEM_LOADABLE, + }, + /* communication region */ { + .virt_start = 0x80000000, + .size = 0x00001000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_COMM_REGION, + }, + }, + + .irqchips = { + /* GIC */ { + .address = 0x01c81000, + .pin_base = 32, + .pin_bitmap = { + 1 << (32-32), 0, 0, 1 << (155-128), + }, + }, + }, + + .pci_devices = { + { /* IVSHMEM 00:00.0 (demo) */ + .type = JAILHOUSE_PCI_TYPE_IVSHMEM, + .domain = 1, + .bdf = 0 << 3, + .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX, + .shmem_regions_start = 0, + .shmem_dev_id = 2, + .shmem_peers = 3, + .shmem_protocol = JAILHOUSE_SHMEM_PROTO_UNDEFINED, + }, + /* IVSHMEM 00:01.0 (networking) */ { + .type = JAILHOUSE_PCI_TYPE_IVSHMEM, + .bdf = 1 << 3, + .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX, + .shmem_regions_start = 5, + .shmem_dev_id = 2, + .shmem_peers = 2, + .shmem_protocol = JAILHOUSE_SHMEM_PROTO_VETH, + }, + }, +}; -- 2.17.1 -- You received this message because you are subscribed to the Google Groups "Jailhouse" group. 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