From: Jan Kiszka <[email protected]> This avoids that the guest has to be aware of how the doorbell interrupt is internally sent to the target CPU because to add the corresponding memory barrier explicitly. The implementation in Jailhouse already fulfills this new requirement.
Signed-off-by: Jan Kiszka <[email protected]> --- Documentation/ivshmem-v2-specification.md | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/ivshmem-v2-specification.md b/Documentation/ivshmem-v2-specification.md index d93cb22b..81ba300b 100644 --- a/Documentation/ivshmem-v2-specification.md +++ b/Documentation/ivshmem-v2-specification.md @@ -314,6 +314,10 @@ selected protocol. Addressing a non-existing or inactive target has no effect. Peers can identify active targets via the State Table. +Implementations of the Doorbell register must ensure that data written by the +CPU prior to issuing the register write is visible to the receiving peer before +the interrupt arrives. + The behavior on reading from this register is undefined. #### State Register (Offset 10h) -- 2.16.4 -- You received this message because you are subscribed to the Google Groups "Jailhouse" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. To view this discussion on the web visit https://groups.google.com/d/msgid/jailhouse-dev/368ff6b2acb3f24ec5903db328d73f2c9d986601.1583516039.git.jan.kiszka%40siemens.com.
