Branch: refs/heads/wip/new-cpu-config
  Home:   https://github.com/siemens/jailhouse
  Commit: 2e430e38148352b9acc63d83d15ac6921da6e6d9
      
https://github.com/siemens/jailhouse/commit/2e430e38148352b9acc63d83d15ac6921da6e6d9
  Author: Jan Kiszka <[email protected]>
  Date:   2020-03-10 (Tue, 10 Mar 2020)

  Changed paths:
    M hypervisor/arch/arm-common/Kbuild
    R hypervisor/arch/arm-common/gic-v3.c
    M hypervisor/arch/arm-common/include/asm/gic.h
    R hypervisor/arch/arm-common/include/asm/gic_v3.h
    M hypervisor/arch/arm-common/irqchip.c
    R hypervisor/arch/arm/include/asm/arch_gicv3.h
    M hypervisor/arch/arm/traps.c
    M hypervisor/arch/arm64/Kbuild
    A hypervisor/arch/arm64/gic-v3.c
    R hypervisor/arch/arm64/include/asm/arch_gicv3.h
    A hypervisor/arch/arm64/include/asm/gic_v3.h
    M hypervisor/arch/arm64/traps.c

  Log Message:
  -----------
  arm, arm64: Make GICv3 arm64-only

There is no 32-bit ARM board that we support and that has a GICv3. Very
likely, such a board does not exist and never will. So move the GICv3
support in Jailhouse to arm64, removing no longer needed abstractions.

Rather than stubbing a GICv3 for irqchip_cpu_init, use #ifdef in this
case which is simpler and gives a more accurate error in case someone
configures a v3 for ARM.

Signed-off-by: Jan Kiszka <[email protected]>


  Commit: fa52f73d979bd0d6ab32ff4bea8c6adac88c789e
      
https://github.com/siemens/jailhouse/commit/fa52f73d979bd0d6ab32ff4bea8c6adac88c789e
  Author: Jan Kiszka <[email protected]>
  Date:   2020-03-10 (Tue, 10 Mar 2020)

  Changed paths:
    M hypervisor/arch/arm-common/control.c
    M hypervisor/arch/arm-common/gic-v2.c
    M hypervisor/arch/arm-common/irqchip.c
    M hypervisor/arch/arm-common/lib.c
    M hypervisor/arch/arm/include/asm/types.h
    M hypervisor/arch/arm64/gic-v3.c
    M hypervisor/arch/arm64/include/asm/types.h
    M hypervisor/arch/x86/apic.c
    M hypervisor/arch/x86/cat.c
    M hypervisor/arch/x86/control.c
    M hypervisor/arch/x86/include/asm/types.h
    M hypervisor/arch/x86/iommu.c
    M hypervisor/control.c
    M hypervisor/include/jailhouse/cell.h
    M hypervisor/include/jailhouse/control.h
    M hypervisor/include/jailhouse/types.h
    M hypervisor/setup.c

  Log Message:
  -----------
  core: Use statically sized cpu sets

Given that we do not face excessive amounts of CPUs so far, are in fact
limited to 254 on x86 e.g., there is no point in the complex bitmap
allocation algorithm used for cpu_set. Introduce a per-arch upper limit
of CPUs (MAX_CPUS) and lay out struct cpu_set accordingly.

Signed-off-by: Jan Kiszka <[email protected]>


  Commit: 44da5b1faed44a0fd7644ac99b4d0a8b72aea2b8
      
https://github.com/siemens/jailhouse/commit/44da5b1faed44a0fd7644ac99b4d0a8b72aea2b8
  Author: Jan Kiszka <[email protected]>
  Date:   2020-03-10 (Tue, 10 Mar 2020)

  Changed paths:
    M hypervisor/setup.c

  Log Message:
  -----------
  core: Move cell_init() of root cell from init_early to init_late

This is possible because no one needs the initialization results of
cell_init() early. These results are in more precisely the cpu_set
bitmap and the mmio subsystem setup for the root cell. At the a same
time, cell_init() will later on benefit from having all CPUs
initialized.

Signed-off-by: Jan Kiszka <[email protected]>


  Commit: d4e1ff6c540354cd5c91130e8ab759915bc52992
      
https://github.com/siemens/jailhouse/commit/d4e1ff6c540354cd5c91130e8ab759915bc52992
  Author: Jan Kiszka <[email protected]>
  Date:   2020-03-11 (Wed, 11 Mar 2020)

  Changed paths:
    M include/jailhouse/cell-config.h

  Log Message:
  -----------
  core: Change CPU configuration to an array of structures

Switch from a bitmap-based way to an array of structures for describing
cell CPUs. This has the advantage that we can decouple Jailhouse from
CPU enumeration of Linux and pass the physical CPUs to the hypervisor.
Furthermore, the structure can be extended later on to associate
configuration information such as cache partitions with a specific CPU.
To avoid breaking the config parser more than needed, 8 bytes are
already reserved in the new structure.

Note that this commit breaks the build in order to break-up the
upcoming changes into smaller logical pieces.

Signed-off-by: Jan Kiszka <[email protected]>


  Commit: 922e96fb6b686fa3bfda85bcd578f5b5ba71e004
      
https://github.com/siemens/jailhouse/commit/922e96fb6b686fa3bfda85bcd578f5b5ba71e004
  Author: Jan Kiszka <[email protected]>
  Date:   2020-03-11 (Wed, 11 Mar 2020)

  Changed paths:
    M driver/cell.c
    M driver/main.c
    M driver/main.h
    M driver/sysfs.c

  Log Message:
  -----------
  driver: Convert to new CPU configuration format

The new format requires the driver to identify a CPU by its physical ID
and then pass its index in the config array to the hypervisor, both on
enabling as well as during runtime (status queries).

For that purpose, two per-cpu variables are initialized while enabling
Jailhouse: phys_cpu_id and jailhouse_cpu_id. Those allow to map the
physical and the Jailhouse-logical CPU IDs to the Linux-logical ID.
Where possible, Jailhouse will validate this mapping during setup.

The driver continues to maintain shadow cpumasks for the assigned CPUs
of a cell using Linux IDs so that those masks can be used for iterating
over them on Linux side.

The new configuration format allows the Linux and Jailhouse CPU ordering
to deviate. As this can cause confusion, a warning is issued by the
driver when such a constellation is detected during setup.

Signed-off-by: Jan Kiszka <[email protected]>


  Commit: 15fd4c59b8228362372eee08ae793db9937fed43
      
https://github.com/siemens/jailhouse/commit/15fd4c59b8228362372eee08ae793db9937fed43
  Author: Jan Kiszka <[email protected]>
  Date:   2020-03-11 (Wed, 11 Mar 2020)

  Changed paths:
    M hypervisor/arch/arm-common/lib.c
    M hypervisor/arch/arm-common/psci.c
    M hypervisor/arch/arm64/gic-v3.c
    M hypervisor/arch/arm64/paging.c
    M hypervisor/arch/x86/apic.c
    M hypervisor/arch/x86/control.c
    M hypervisor/control.c
    M hypervisor/include/jailhouse/control.h
    M hypervisor/include/jailhouse/percpu.h
    M hypervisor/include/jailhouse/processor.h
    M hypervisor/setup.c

  Log Message:
  -----------
  core: Convert to new CPU configuration format

These are the necessary changes to adapt the hypervisor core to the new
struct-array CPU configuration format.

Some things become easier - cpu_id_valid() is now a simple inline bounds
check, counting CPUs is already done in the config -, some more complex.
An arch-provided cpu_by_phys_processor_id() is now required in order to
map a non-root cell CPU on the logical ID used inside Jailhouse during
cell creation. Jailhouse keeps the bitmap of assigned CPUs per cell in
order to iterate over them without requiring that physical-to-logical
mapping during critical code paths.

Signed-off-by: Jan Kiszka <[email protected]>


  Commit: 0b1777040ebd26c70fd8e38137cb870d6f83b23f
      
https://github.com/siemens/jailhouse/commit/0b1777040ebd26c70fd8e38137cb870d6f83b23f
  Author: Jan Kiszka <[email protected]>
  Date:   2020-03-11 (Wed, 11 Mar 2020)

  Changed paths:
    M pyjailhouse/sysfs_parser.py
    M tools/jailhouse-cell-linux
    M tools/jailhouse-config-create
    M tools/jailhouse-hardware-check
    M tools/root-cell-config.c.tmpl

  Log Message:
  -----------
  tools: Convert to new CPU configuration format

This updates the sysfs parser, config generator and other
config-evaluating tools to the new format.

For generating x86 configs, we are parsing /proc/cpuinfo for the initial
APIC ID and use that - in Linux order - to fill out the config template.

Signed-off-by: Jan Kiszka <[email protected]>


  Commit: c3fe8da9a1b9be40f04e9a4b82d120b3a2b3b773
      
https://github.com/siemens/jailhouse/commit/c3fe8da9a1b9be40f04e9a4b82d120b3a2b3b773
  Author: Jan Kiszka <[email protected]>
  Date:   2020-03-11 (Wed, 11 Mar 2020)

  Changed paths:
    M configs/x86/apic-demo.c
    M configs/x86/e1000-demo.c
    M configs/x86/f2a88xm-hd3.c
    M configs/x86/imb-a180.c
    M configs/x86/ioapic-demo.c
    M configs/x86/ivshmem-demo.c
    M configs/x86/linux-x86-demo.c
    M configs/x86/pci-demo.c
    M configs/x86/qemu-x86.c
    M configs/x86/smp-demo.c
    M configs/x86/tiny-demo.c

  Log Message:
  -----------
  configs: x86: Convert to new CPU configuration format

Signed-off-by: Jan Kiszka <[email protected]>


  Commit: c3e7cb0d5f69609fdad85c8f07a55e76d95b5de7
      
https://github.com/siemens/jailhouse/commit/c3e7cb0d5f69609fdad85c8f07a55e76d95b5de7
  Author: Jan Kiszka <[email protected]>
  Date:   2020-03-11 (Wed, 11 Mar 2020)

  Changed paths:
    M configs/arm/bananapi-inmate-demo.c
    M configs/arm/bananapi-linux-demo.c
    M configs/arm/bananapi.c
    M configs/arm/emtrion-rzg1e-inmate-demo.c
    M configs/arm/emtrion-rzg1e-linux-demo.c
    M configs/arm/emtrion-rzg1e.c
    M configs/arm/emtrion-rzg1h-inmate-demo.c
    M configs/arm/emtrion-rzg1h-linux-demo.c
    M configs/arm/emtrion-rzg1h.c
    M configs/arm/emtrion-rzg1m-inmate-demo.c
    M configs/arm/emtrion-rzg1m-linux-demo.c
    M configs/arm/emtrion-rzg1m.c
    M configs/arm/jetson-tk1-inmate-demo.c
    M configs/arm/jetson-tk1-linux-demo.c
    M configs/arm/jetson-tk1.c
    M configs/arm/orangepi0-inmate-demo.c
    M configs/arm/orangepi0-linux-demo.c
    M configs/arm/orangepi0.c

  Log Message:
  -----------
  configs: arm: Convert to new CPU configuration format

At this chance, move the jetson-tk1-inmate-demo from CPU 3 to 1,
avoiding the overlap with its linux-demo and aligning it with other
systems with 4 or more cores.

Signed-off-by: Jan Kiszka <[email protected]>


  Commit: b7abab489ba4adcaa4d5f4c07ff6943d48d93978
      
https://github.com/siemens/jailhouse/commit/b7abab489ba4adcaa4d5f4c07ff6943d48d93978
  Author: Jan Kiszka <[email protected]>
  Date:   2020-03-11 (Wed, 11 Mar 2020)

  Changed paths:
    M configs/arm64/amd-seattle-inmate-demo.c
    M configs/arm64/amd-seattle-linux-demo.c
    M configs/arm64/amd-seattle.c
    M configs/arm64/espressobin-inmate-demo.c
    M configs/arm64/espressobin-linux-demo.c
    M configs/arm64/espressobin.c
    M configs/arm64/foundation-v8-inmate-demo.c
    M configs/arm64/foundation-v8-linux-demo.c
    M configs/arm64/foundation-v8.c
    M configs/arm64/hikey-inmate-demo.c
    M configs/arm64/hikey-linux-demo.c
    M configs/arm64/hikey.c
    M configs/arm64/imx8mq-inmate-demo.c
    M configs/arm64/imx8mq.c
    M configs/arm64/jetson-tx1-inmate-demo.c
    M configs/arm64/jetson-tx1-linux-demo.c
    M configs/arm64/jetson-tx1.c
    M configs/arm64/jetson-tx2-inmate-demo.c
    M configs/arm64/jetson-tx2.c
    M configs/arm64/k3-am654-idk-linux-demo.c
    M configs/arm64/k3-am654-idk.c
    M configs/arm64/k3-am654-inmate-demo.c
    M configs/arm64/k3-j721e-evm-inmate-demo.c
    M configs/arm64/k3-j721e-evm-linux-demo.c
    M configs/arm64/k3-j721e-evm.c
    M configs/arm64/macchiatobin-inmate-demo.c
    M configs/arm64/macchiatobin-linux-demo.c
    M configs/arm64/macchiatobin.c
    M configs/arm64/miriac-sbc-ls1046a-inmate-demo.c
    M configs/arm64/miriac-sbc-ls1046a-linux-demo.c
    M configs/arm64/miriac-sbc-ls1046a.c
    M configs/arm64/pine64-plus-inmate-demo.c
    M configs/arm64/pine64-plus-linux-demo.c
    M configs/arm64/pine64-plus.c
    M configs/arm64/qemu-arm64-inmate-demo.c
    M configs/arm64/qemu-arm64-linux-demo.c
    M configs/arm64/qemu-arm64.c
    M configs/arm64/rpi4-inmate-demo.c
    M configs/arm64/rpi4-linux-demo.c
    M configs/arm64/rpi4.c
    M configs/arm64/ultra96-inmate-demo.c
    M configs/arm64/ultra96-linux-demo.c
    M configs/arm64/ultra96.c
    M configs/arm64/zynqmp-zcu102-inmate-demo.c
    M configs/arm64/zynqmp-zcu102-linux-demo-2.c
    M configs/arm64/zynqmp-zcu102-linux-demo.c
    M configs/arm64/zynqmp-zcu102.c

  Log Message:
  -----------
  configs: arm64: Convert to new CPU configuration format

At this chance, the inmate demo is moved to the second core for
jetson-tx1, miriac, ultra96 and zynqmp-zcu102.

Signed-off-by: Jan Kiszka <[email protected]>


  Commit: 649112fa4de2de64b64356c3ca2013b76bfcc3fa
      
https://github.com/siemens/jailhouse/commit/649112fa4de2de64b64356c3ca2013b76bfcc3fa
  Author: Jan Kiszka <[email protected]>
  Date:   2020-03-11 (Wed, 11 Mar 2020)

  Changed paths:
    M hypervisor/control.c
    M hypervisor/include/jailhouse/control.h
    M hypervisor/include/jailhouse/types.h

  Log Message:
  -----------
  core: Optimize parsing of large CPU sets

Currently, the for_each_cpu iterators scan the whole given CPU set
bitwise. Since we use static CPU set sizes, we scan even more bits
needlessly for most workloads. This is particularly relevant for sending
IPIs that go out to set of CPUs.

But the common case of having a small and non-sparse bitmap can easily
be optimized by scanning the lower and upper boundaries once during
setup of the CPU set and then using those limits in for_each_cpu*.

At this chance, reduce the type of the boundaries to unsigned int
because we do not support 4 billion CPUs anyway.

Signed-off-by: Jan Kiszka <[email protected]>


Compare: 
https://github.com/siemens/jailhouse/compare/2e430e381483%5E...649112fa4de2

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