Signed-off-by: Alice Guo <[email protected]>
---
configs/arm64/imx8mp-inmate-demo.c | 126 +++++++++++++++++++
configs/arm64/imx8mp-linux-demo.c | 167 +++++++++++++++++++++++++
configs/arm64/imx8mp.c | 191 +++++++++++++++++++++++++++++
3 files changed, 484 insertions(+)
create mode 100644 configs/arm64/imx8mp-inmate-demo.c
create mode 100644 configs/arm64/imx8mp-linux-demo.c
create mode 100644 configs/arm64/imx8mp.c
diff --git a/configs/arm64/imx8mp-inmate-demo.c
b/configs/arm64/imx8mp-inmate-demo.c
new file mode 100644
index 00000000..795c616f
--- /dev/null
+++ b/configs/arm64/imx8mp-inmate-demo.c
@@ -0,0 +1,126 @@
+/*
+ * iMX8MM target - inmate-demo
+ *
+ * Copyright 2020 NXP
+ *
+ * Authors:
+ * Peng Fan <[email protected]>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2. See
+ * the COPYING file in the top-level directory.
+ */
+
+#include <jailhouse/types.h>
+#include <jailhouse/cell-config.h>
+
+struct {
+ struct jailhouse_cell_desc cell;
+ __u64 cpus[1];
+ struct jailhouse_memory mem_regions[8];
+ struct jailhouse_irqchip irqchips[1];
+ struct jailhouse_pci_device pci_devices[1];
+} __attribute__((packed)) config = {
+ .cell = {
+ .signature = JAILHOUSE_CELL_DESC_SIGNATURE,
+ .revision = JAILHOUSE_CONFIG_REVISION,
+ .name = "inmate-demo",
+ .flags = JAILHOUSE_CELL_PASSIVE_COMMREG,
+
+ .cpu_set_size = sizeof(config.cpus),
+ .num_memory_regions = ARRAY_SIZE(config.mem_regions),
+ .num_irqchips = ARRAY_SIZE(config.irqchips),
+ .num_pci_devices = ARRAY_SIZE(config.pci_devices),
+ /* IVSHMEM_IRQ - 32 */
+ .vpci_irq_base = 76, /* Not include 32 base */
+
+ .console = {
+ .address = 0x30890000,
+ .type = JAILHOUSE_CON_TYPE_IMX,
+ .flags = JAILHOUSE_CON_ACCESS_MMIO |
+ JAILHOUSE_CON_REGDIST_4,
+ },
+ },
+
+ .cpus = {
+ 0x8,
+ },
+
+ .mem_regions = {
+ /* IVSHMEM shared memory regions (demo) */
+ {
+ .phys_start = 0xfd900000,
+ .virt_start = 0xfd900000,
+ .size = 0x1000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED,
+ },
+ {
+ .phys_start = 0xfd901000,
+ .virt_start = 0xfd901000,
+ .size = 0x9000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_ROOTSHARED,
+ },
+ {
+ .phys_start = 0xfd90a000,
+ .virt_start = 0xfd90a000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED,
+ },
+ {
+ .phys_start = 0xfd90c000,
+ .virt_start = 0xfd90c000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_ROOTSHARED,
+ },
+ {
+ .phys_start = 0xfd90e000,
+ .virt_start = 0xfd90e000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED,
+ },
+ /* UART2 */ {
+ .phys_start = 0x30890000,
+ .virt_start = 0x30890000,
+ .size = 0x1000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO | JAILHOUSE_MEM_ROOTSHARED,
+ },
+ /* RAM: start from the bottom of inmate memory */ {
+ .phys_start = 0xc0000000,
+ .virt_start = 0,
+ .size = 0x00010000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE,
+ },
+ /* communication region */ {
+ .virt_start = 0x80000000,
+ .size = 0x00001000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_COMM_REGION,
+ },
+ },
+
+ .irqchips = {
+ /* GIC */ {
+ .address = 0x38800000,
+ .pin_base = 96,
+ .pin_bitmap = {
+ 0x1 << (76 + 32 - 96) /* SPI 76 */
+ },
+ },
+ },
+
+ .pci_devices = {
+ {
+ .type = JAILHOUSE_PCI_TYPE_IVSHMEM,
+ .domain = 1,
+ .bdf = 0 << 3,
+ .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX,
+ .shmem_regions_start = 0,
+ .shmem_dev_id = 1,
+ .shmem_peers = 1,
+ .shmem_protocol = JAILHOUSE_SHMEM_PROTO_UNDEFINED,
+ },
+ },
+};
diff --git a/configs/arm64/imx8mp-linux-demo.c
b/configs/arm64/imx8mp-linux-demo.c
new file mode 100644
index 00000000..ff0cdffb
--- /dev/null
+++ b/configs/arm64/imx8mp-linux-demo.c
@@ -0,0 +1,167 @@
+/*
+ * iMX8MM target - linux-demo
+ *
+ * Copyright 2020 NXP
+ *
+ * Authors:
+ * Peng Fan <[email protected]>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2. See
+ * the COPYING file in the top-level directory.
+ */
+
+/*
+ * Boot 2nd Linux cmdline:
+ * export PATH=$PATH:/usr/share/jailhouse/tools/
+ * jailhouse cell linux imx8mp-linux-demo.cell Image -d
imx8mp-evk-inmate.dtb -c "clk_ignore_unused console=ttymxc3,115200
earlycon=ec_imx6q,0x30890000,115200 root=/dev/mmcblk2p2 rootwait rw"
+ */
+#include <jailhouse/types.h>
+#include <jailhouse/cell-config.h>
+
+struct {
+ struct jailhouse_cell_desc cell;
+ __u64 cpus[1];
+ struct jailhouse_memory mem_regions[15];
+ struct jailhouse_irqchip irqchips[2];
+ struct jailhouse_pci_device pci_devices[2];
+} __attribute__((packed)) config = {
+ .cell = {
+ .signature = JAILHOUSE_CELL_DESC_SIGNATURE,
+ .revision = JAILHOUSE_CONFIG_REVISION,
+ .name = "linux-inmate-demo",
+ .flags = JAILHOUSE_CELL_PASSIVE_COMMREG,
+
+ .cpu_set_size = sizeof(config.cpus),
+ .num_memory_regions = ARRAY_SIZE(config.mem_regions),
+ .num_irqchips = ARRAY_SIZE(config.irqchips),
+ .num_pci_devices = ARRAY_SIZE(config.pci_devices),
+ .vpci_irq_base = 154, /* Not include 32 base */
+ },
+
+ .cpus = {
+ 0xc,
+ },
+
+ .mem_regions = {
+ /* IVHSMEM shared memory region for 00:00.0 (demo )*/ {
+ .phys_start = 0xfd900000,
+ .virt_start = 0xfd900000,
+ .size = 0x1000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED,
+ },
+ {
+ .phys_start = 0xfd901000,
+ .virt_start = 0xfd901000,
+ .size = 0x9000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_ROOTSHARED,
+ },
+ {
+ .phys_start = 0xfd90a000,
+ .virt_start = 0xfd90a000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED,
+ },
+ {
+ .phys_start = 0xfd90c000,
+ .virt_start = 0xfd90c000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED,
+ },
+ {
+ .phys_start = 0xfd90e000,
+ .virt_start = 0xfd90e000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_ROOTSHARED,
+ },
+ /* IVSHMEM shared memory regions for 00:01.0 (networking) */
+ JAILHOUSE_SHMEM_NET_REGIONS(0xfda00000, 1),
+ /* UART2 earlycon */ {
+ .phys_start = 0x30890000,
+ .virt_start = 0x30890000,
+ .size = 0x1000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO | JAILHOUSE_MEM_ROOTSHARED,
+ },
+ /* UART4 */ {
+ .phys_start = 0x30a60000,
+ .virt_start = 0x30a60000,
+ .size = 0x1000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* SHDC3 */ {
+ .phys_start = 0x30b60000,
+ .virt_start = 0x30b60000,
+ .size = 0x10000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* RAM: Top at 4GB Space */ {
+ .phys_start = 0xfdb00000,
+ .virt_start = 0,
+ .size = 0x10000, /* 64KB */
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE,
+ },
+ /* RAM */ {
+ /*
+ * We could not use 0x80000000 which conflicts with
+ * COMM_REGION_BASE
+ */
+ .phys_start = 0xc0000000,
+ .virt_start = 0xc0000000,
+ .size = 0x3d700000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA |
+ JAILHOUSE_MEM_LOADABLE,
+ },
+ /* communication region */ {
+ .virt_start = 0x80000000,
+ .size = 0x00001000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_COMM_REGION,
+ },
+ },
+
+ .irqchips = {
+ /* uart2/sdhc1 */ {
+ .address = 0x38800000,
+ .pin_base = 32,
+ .pin_bitmap = {
+ (1 << (24 + 32 - 32)) | (1 << (29 + 32 - 32))
+ },
+ },
+ /* IVSHMEM */ {
+ .address = 0x38800000,
+ .pin_base = 160,
+ .pin_bitmap = {
+ 0xf << (154 + 32 - 160) /* SPI 154-157 */
+ },
+ },
+ },
+
+ .pci_devices = {
+ { /* IVSHMEM 00:00.0 (demo) */
+ .type = JAILHOUSE_PCI_TYPE_IVSHMEM,
+ .domain = 0,
+ .bdf = 0 << 3,
+ .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX,
+ .shmem_regions_start = 0,
+ .shmem_dev_id = 2,
+ .shmem_peers = 3,
+ .shmem_protocol = JAILHOUSE_SHMEM_PROTO_UNDEFINED,
+ },
+ { /* IVSHMEM 00:01.0 (networking) */
+ .type = JAILHOUSE_PCI_TYPE_IVSHMEM,
+ .domain = 0,
+ .bdf = 1 << 3,
+ .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX,
+ .shmem_regions_start = 5,
+ .shmem_dev_id = 1,
+ .shmem_peers = 2,
+ .shmem_protocol = JAILHOUSE_SHMEM_PROTO_VETH,
+ },
+ },
+};
diff --git a/configs/arm64/imx8mp.c b/configs/arm64/imx8mp.c
new file mode 100644
index 00000000..b870a788
--- /dev/null
+++ b/configs/arm64/imx8mp.c
@@ -0,0 +1,191 @@
+/*
+ * i.MX8MM Target
+ *
+ * Copyright 2020 NXP
+ *
+ * Authors:
+ * Peng Fan <[email protected]>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2. See
+ * the COPYING file in the top-level directory.
+ *
+ * Reservation via device tree: reg = <0x0 0xffaf0000 0x0 0x510000>
+ */
+
+#include <jailhouse/types.h>
+#include <jailhouse/cell-config.h>
+
+struct {
+ struct jailhouse_system header;
+ __u64 cpus[1];
+ struct jailhouse_memory mem_regions[15];
+ struct jailhouse_irqchip irqchips[3];
+ struct jailhouse_pci_device pci_devices[2];
+} __attribute__((packed)) config = {
+ .header = {
+ .signature = JAILHOUSE_SYSTEM_SIGNATURE,
+ .revision = JAILHOUSE_CONFIG_REVISION,
+ .flags = JAILHOUSE_SYS_VIRTUAL_DEBUG_CONSOLE,
+ .hypervisor_memory = {
+ .phys_start = 0xfdc00000,
+ .size = 0x00400000,
+ },
+ .debug_console = {
+ .address = 0x30890000,
+ .size = 0x1000,
+ .flags = JAILHOUSE_CON_TYPE_IMX |
+ JAILHOUSE_CON_ACCESS_MMIO |
+ JAILHOUSE_CON_REGDIST_4,
+ .type = JAILHOUSE_CON_TYPE_IMX,
+ },
+ .platform_info = {
+ .pci_mmconfig_base = 0xfd700000,
+ .pci_mmconfig_end_bus = 0,
+ .pci_is_virtual = 1,
+ .pci_domain = 0,
+
+ .arm = {
+ .gic_version = 3,
+ .gicd_base = 0x38800000,
+ .gicr_base = 0x38880000,
+ .maintenance_irq = 25,
+ },
+ },
+ .root_cell = {
+ .name = "imx8mp",
+
+ .num_pci_devices = ARRAY_SIZE(config.pci_devices),
+ .cpu_set_size = sizeof(config.cpus),
+ .num_memory_regions = ARRAY_SIZE(config.mem_regions),
+ .num_irqchips = ARRAY_SIZE(config.irqchips),
+ /* gpt5/4/3/2 not used by root cell */
+ .vpci_irq_base = 51, /* Not include 32 base */
+ },
+ },
+
+ .cpus = {
+ 0xf,
+ },
+
+ .mem_regions = {
+ /* IVHSMEM shared memory region for 00:00.0 (demo )*/ {
+ .phys_start = 0xfd900000,
+ .virt_start = 0xfd900000,
+ .size = 0x1000,
+ .flags = JAILHOUSE_MEM_READ,
+ },
+ {
+ .phys_start = 0xfd901000,
+ .virt_start = 0xfd901000,
+ .size = 0x9000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE ,
+ },
+ {
+ .phys_start = 0xfd90a000,
+ .virt_start = 0xfd90a000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE ,
+ },
+ {
+ .phys_start = 0xfd90c000,
+ .virt_start = 0xfd90c000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ,
+ },
+ {
+ .phys_start = 0xfd90e000,
+ .virt_start = 0xfd90e000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ,
+ },
+ /* IVSHMEM shared memory regions for 00:01.0 (networking) */
+ JAILHOUSE_SHMEM_NET_REGIONS(0xfda00000, 0),
+ /* IO */ {
+ .phys_start = 0x00000000,
+ .virt_start = 0x00000000,
+ .size = 0x40000000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* RAM 00*/ {
+ .phys_start = 0x40000000,
+ .virt_start = 0x40000000,
+ .size = 0x80000000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_EXECUTE,
+ },
+ /* Inmate memory */{
+ .phys_start = 0xc0000000,
+ .virt_start = 0xc0000000,
+ .size = 0x3d700000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_EXECUTE,
+ },
+ /* Loader */{
+ .phys_start = 0xfdb00000,
+ .virt_start = 0xfdb00000,
+ .size = 0x100000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_EXECUTE,
+ },
+ /* OP-TEE reserved memory?? */{
+ .phys_start = 0xfe000000,
+ .virt_start = 0xfe000000,
+ .size = 0x2000000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
+ },
+ /* RAM04 */{
+ .phys_start = 0x100000000,
+ .virt_start = 0x100000000,
+ .size = 0xC0000000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
+ },
+ },
+
+ .irqchips = {
+ /* GIC */ {
+ .address = 0x38800000,
+ .pin_base = 32,
+ .pin_bitmap = {
+ 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
+ },
+ },
+ /* GIC */ {
+ .address = 0x38800000,
+ .pin_base = 160,
+ .pin_bitmap = {
+ 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
+ },
+ },
+ /* GIC */ {
+ .address = 0x38800000,
+ .pin_base = 288,
+ .pin_bitmap = {
+ 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
+ },
+ },
+ },
+
+ .pci_devices = {
+ { /* IVSHMEM 0000:00:00.0 (demo) */
+ .type = JAILHOUSE_PCI_TYPE_IVSHMEM,
+ .domain = 0,
+ .bdf = 0 << 3,
+ .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX,
+ .shmem_regions_start = 0,
+ .shmem_dev_id = 0,
+ .shmem_peers = 3,
+ .shmem_protocol = JAILHOUSE_SHMEM_PROTO_UNDEFINED,
+ },
+ { /* IVSHMEM 0000:00:01.0 (networking) */
+ .type = JAILHOUSE_PCI_TYPE_IVSHMEM,
+ .domain = 0,
+ .bdf = 1 << 3,
+ .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX,
+ .shmem_regions_start = 5,
+ .shmem_dev_id = 0,
+ .shmem_peers = 2,
+ .shmem_protocol = JAILHOUSE_SHMEM_PROTO_VETH,
+ },
+ },
+};
