>
> Sorry for the late reply. From your description, I also do not see why
> this shouldn't work. Not other changes made than described?
>
No, just renamed the root cell to make sure I use the right config. I
attached the config to this email.
If things got that weird, I sometimes instrumented paging_create()
> (printk) to match the actually performed mappings against expectations.
> "jailhouse config check" is now also available, just to double-check.
>
Thanks for the idea. I tried adding the line:
printk("paging_create: phys: %lx virt: %lx size: %lx\n", phys,
virt, size);
at the very beginning of paging_create and checked the output on the serial
console. It seems that the second mapping doesn't happen at all. I attached
the log with mappings too.
Jakub
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root@demo:~# jailhouse enable rpi4-4g.cell
Initializing Jailhouse hypervisor v0.12 (0-g92db71f2-dirty) on CPU 3
Code location: 0x0000ffffc0200800
paging_create: phys: 3fc00000 virt: ffffc0200000 size: 400000
paging_create: phys: 3fc1e000 virt: ffffc021e000 size: 2000
paging_create: phys: 3fc00000 virt: ffffc0200000 size: 200000
paging_create: phys: 3fc22000 virt: ffffc0222000 size: 2000
paging_create: phys: 3fc26000 virt: ffffc0226000 size: 2000
paging_create: phys: 3fc2a000 virt: ffffc022a000 size: 2000
paging_create: phys: fe215040 virt: ffffc0015040 size: 40
paging_create: phys: 3fc17000 virt: 3fc17000 size: 1000
paging_create: phys: 3fc11000 virt: 0 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc00000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc01000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc02000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc03000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc04000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc05000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc06000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc07000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc08000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc09000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc0a000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc0b000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc0c000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc0d000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc0e000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc0f000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc10000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc11000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc12000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc13000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc14000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc15000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc16000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc17000 size: 1000
paging_create: phys: 3fc18000 virt: 3fc18000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc19000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc1a000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc1b000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc1c000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc1d000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc1e000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc1f000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc20000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc21000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc22000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc23000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc24000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc25000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc26000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc27000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc28000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc29000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc2a000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc2b000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc2c000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc2d000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc2e000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc2f000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc30000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc31000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc32000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc33000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc34000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc35000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc36000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc37000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc38000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc39000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc3a000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc3b000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc3c000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc3d000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc3e000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc3f000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc40000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc41000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc42000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc43000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc44000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc45000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc46000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc47000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc48000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc49000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc4a000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc4b000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc4c000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc4d000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc4e000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc4f000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc50000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc51000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc52000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc53000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc54000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc55000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc56000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc57000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc58000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc59000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc5a000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc5b000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc5c000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc5d000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc5e000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc5f000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc60000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc61000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc62000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc63000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc64000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc65000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc66000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc67000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc68000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc69000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc6a000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc6b000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc6c000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc6d000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc6e000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc6f000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc70000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc71000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc72000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc73000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc74000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc75000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc76000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc77000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc78000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc79000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc7a000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc7b000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc7c000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc7d000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc7e000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc7f000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc80000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc81000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc82000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc83000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc84000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc85000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc86000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc87000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc88000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc89000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc8a000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc8b000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc8c000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc8d000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc8e000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc8f000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc90000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc91000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc92000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc93000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc94000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc95000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc96000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc97000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc98000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc99000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc9a000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc9b000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc9c000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc9d000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc9e000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fc9f000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fca0000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fca1000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fca2000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fca3000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fca4000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fca5000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fca6000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fca7000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fca8000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fca9000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcaa000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcab000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcac000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcad000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcae000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcaf000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcb0000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcb1000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcb2000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcb3000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcb4000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcb5000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcb6000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcb7000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcb8000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcb9000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcba000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcbb000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcbc000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcbd000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcbe000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcbf000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcc0000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcc1000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcc2000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcc3000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcc4000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcc5000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcc6000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcc7000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcc8000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcc9000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcca000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fccb000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fccc000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fccd000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcce000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fccf000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcd0000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcd1000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcd2000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcd3000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcd4000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcd5000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcd6000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcd7000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcd8000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcd9000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcda000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcdb000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcdc000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcdd000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcde000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcdf000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fce0000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fce1000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fce2000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fce3000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fce4000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fce5000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fce6000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fce7000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fce8000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fce9000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcea000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fceb000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcec000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fced000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcee000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcef000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcf0000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcf1000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcf2000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcf3000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcf4000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcf5000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcf6000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcf7000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcf8000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcf9000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcfa000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcfb000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcfc000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcfd000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcfe000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fcff000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd00000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd01000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd02000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd03000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd04000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd05000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd06000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd07000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd08000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd09000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd0a000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd0b000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd0c000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd0d000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd0e000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd0f000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd10000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd11000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd12000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd13000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd14000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd15000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd16000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd17000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd18000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd19000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd1a000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd1b000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd1c000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd1d000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd1e000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd1f000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd20000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd21000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd22000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd23000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd24000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd25000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd26000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd27000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd28000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd29000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd2a000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd2b000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd2c000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd2d000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd2e000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd2f000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd30000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd31000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd32000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd33000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd34000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd35000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd36000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd37000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd38000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd39000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd3a000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd3b000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd3c000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd3d000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd3e000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd3f000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd40000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd41000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd42000 size: 1000
paging_create: phys: 3fc0f000 virt: 3fd43000 size: 1000
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paging_create: phys: 3fc0f000 virt: 3fffe000 size: 1000
paging_create: phys: 3fc0f000 virt: 3ffff000 size: 1000
Page pool usage after early setup: mem 39/994, remap 0/131072
Initializing processors:
CPU 3... paging_create: phys: 3fc2a000 virt: ff0000010000 size: 4000
paging_create: phys: ff841000 virt: ff8000000000 size: 1000
paging_create: phys: ff842000 virt: ff8000001000 size: 2000
paging_create: phys: ff844000 virt: ff8000003000 size: 2000
paging_create: phys: 0 virt: ff0000000000 size: 10000
OK
CPU 0... paging_create: phys: 3fc1e000 virt: ff0000010000 size: 4000
paging_create: phys: 0 virt: ff0000000000 size: 10000
OK
CPU 1... paging_create: phys: 3fc22000 virt: ff0000010000 size: 4000
paging_create: phys: 0 virt: ff0000000000 size: 10000
OK
CPU 2... paging_create: phys: 3fc26000 virt: ff0000010000 size: 4000
paging_create: phys: 0 virt: ff0000000000 size: 10000
OK
Initializing unit: irqchip
paging_create: phys: ff846000 virt: ff842000 size: 2000
Initializing unit: ARM SMMU v3
Initializing unit: PVU IOMMU
Initializing unit: PCI
Adding virtual PCI device 00:00.0 to cell "Raspberry-Pi4 4G"
paging_create: phys: 3faf0000 virt: ff0000000000 size: 1000
Adding virtual PCI device 00:01.0 to cell "Raspberry-Pi4 4G"
paging_create: phys: 3fb00000 virt: ff0000000000 size: 1000
paging_create: phys: 3faf0000 virt: 3faf0000 size: 1000
paging_create: phys: 3faf1000 virt: 3faf1000 size: 9000
paging_create: phys: 3fafa000 virt: 3fafa000 size: 2000
paging_create: phys: 3fafc000 virt: 3fafc000 size: 2000
paging_create: phys: 3fafe000 virt: 3fafe000 size: 2000
paging_create: phys: 3fb00000 virt: 3fb00000 size: 1000
paging_create: phys: 0 virt: 0 size: 0
paging_create: phys: 3fb01000 virt: 3fb01000 size: 7f000
paging_create: phys: 3fb80000 virt: 3fb80000 size: 7f000
paging_create: phys: fd500000 virt: fd500000 size: 1b00000
paging_create: phys: 600000000 virt: 600000000 size: 4000000
paging_create: phys: 0 virt: 0 size: 3fa10000
Page pool usage after late setup: mem 61/994, remap 5/131072
Activating hypervisor
paging_create: phys: 3fc1e000 virt: ffffc021e000 size: 2000
FATAL: instruction abort at 0xfbfff7d8
FATAL: forbidden access (exception class 0x20)
Cell state before exception:
pc: ffffffc0089fd7d8 lr: ffffffc0089fd7d8 spsr: 20000085 EL1
sp: ffffffc010003ef0 esr: 20 1 0000086
x0: 0000000000000000 x1: 0000000000000000 x2: 0000000000000000
x3: 0000000000000000 x4: 0000000000000000 x5: 0000000000000000
x6: 0000000000000000 x7: 0000000000000000 x8: 0000000000000000
x9: 0000000000000000 x10: 0000000000000000 x11: 0000000000000000
x12: 0000000000000000 x13: 0000000000000000 x14: 0000000000000000
x15: 0000000000000000 x16: 0000000000000000 x17: 0000000000000000
x18: 0000000000000000 x19: ffffffc008a04c28 x20: ffffffc014800000
x21: 0000000000000000 x22: 0000000000000001 x23: 0000000000000000
x24: 0000000000000001 x25: 0000000000000001 x26: ffffffc010da3d50
x27: 0000000000000000 x28: ffffffc010daf580 x29: ffffffc010003ef0
Parking CPU 0 (Cell: "Raspberry-Pi4 4G")
/*
* Jailhouse, a Linux-based partitioning hypervisor
*
* Test configuration for Raspberry Pi 4 (32-bit, quad-core Cortex-A72, 1GB RAM)
*
* Copyright (c) Siemens AG, 2020
*
* Authors:
* Jan Kiszka <[email protected]>
*
* This work is licensed under the terms of the GNU GPL, version 2. See
* the COPYING file in the top-level directory.
*/
#include <jailhouse/types.h>
#include <jailhouse/cell-config.h>
struct {
struct jailhouse_system header;
__u64 cpus[1];
struct jailhouse_memory mem_regions[12];
struct jailhouse_irqchip irqchips[2];
struct jailhouse_pci_device pci_devices[2];
} __attribute__((packed)) config = {
.header = {
.signature = JAILHOUSE_SYSTEM_SIGNATURE,
.revision = JAILHOUSE_CONFIG_REVISION,
.flags = JAILHOUSE_SYS_VIRTUAL_DEBUG_CONSOLE,
.hypervisor_memory = {
.phys_start = 0x3fc00000,
.size = 0x00400000,
},
.debug_console = {
.address = 0xfe215040,
.size = 0x40,
.type = JAILHOUSE_CON_TYPE_8250,
.flags = JAILHOUSE_CON_ACCESS_MMIO |
JAILHOUSE_CON_REGDIST_4,
},
.platform_info = {
.pci_mmconfig_base = 0xe0000000,
.pci_mmconfig_end_bus = 0,
.pci_is_virtual = 1,
.pci_domain = 1,
.arm = {
.gic_version = 2,
.gicd_base = 0xff841000,
.gicc_base = 0xff842000,
.gich_base = 0xff844000,
.gicv_base = 0xff846000,
.maintenance_irq = 25,
},
},
.root_cell = {
.name = "Raspberry-Pi4 4G",
.cpu_set_size = sizeof(config.cpus),
.num_memory_regions = ARRAY_SIZE(config.mem_regions),
.num_irqchips = ARRAY_SIZE(config.irqchips),
.num_pci_devices = ARRAY_SIZE(config.pci_devices),
.vpci_irq_base = 182 - 32,
},
},
.cpus = {
0b1111,
},
.mem_regions = {
/* IVSHMEM shared memory regions for 00:00.0 (demo) */
{
.phys_start = 0x3faf0000,
.virt_start = 0x3faf0000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ,
},
{
.phys_start = 0x3faf1000,
.virt_start = 0x3faf1000,
.size = 0x9000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
{
.phys_start = 0x3fafa000,
.virt_start = 0x3fafa000,
.size = 0x2000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
{
.phys_start = 0x3fafc000,
.virt_start = 0x3fafc000,
.size = 0x2000,
.flags = JAILHOUSE_MEM_READ,
},
{
.phys_start = 0x3fafe000,
.virt_start = 0x3fafe000,
.size = 0x2000,
.flags = JAILHOUSE_MEM_READ,
},
/* IVSHMEM shared memory regions for 00:01.0 (networking) */
JAILHOUSE_SHMEM_NET_REGIONS(0x3fb00000, 0),
/* MMIO 1 (permissive) */ {
.phys_start = 0xfd500000,
.virt_start = 0xfd500000,
.size = 0x1b00000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* MMIO 2 (permissive) */ {
.phys_start = 0x600000000,
.virt_start = 0x600000000,
.size = 0x4000000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* RAM (0M-1018M) */ {
.phys_start = 0x0,
.virt_start = 0x0,
.size = 0x3fa10000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE,
},
/* RAM (1024M-3008M) */ {
.phys_start = 0x40000000,
.virt_start = 0x40000000,
.size = 0xbc000000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE,
},
},
.irqchips = {
/* GIC */ {
.address = 0xff841000,
.pin_base = 32,
.pin_bitmap = {
0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
},
},
/* GIC */ {
.address = 0xff841000,
.pin_base = 160,
.pin_bitmap = {
0xffffffff, 0xffffffff
},
},
},
.pci_devices = {
{ /* IVSHMEM 0001:00:00.0 (demo) */
.type = JAILHOUSE_PCI_TYPE_IVSHMEM,
.domain = 1,
.bdf = 0 << 3,
.bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX,
.shmem_regions_start = 0,
.shmem_dev_id = 0,
.shmem_peers = 3,
.shmem_protocol = JAILHOUSE_SHMEM_PROTO_UNDEFINED,
},
{ /* IVSHMEM 0001:00:01.0 (networking) */
.type = JAILHOUSE_PCI_TYPE_IVSHMEM,
.domain = 1,
.bdf = 1 << 3,
.bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX,
.shmem_regions_start = 5,
.shmem_dev_id = 0,
.shmem_peers = 2,
.shmem_protocol = JAILHOUSE_SHMEM_PROTO_VETH,
},
},
};
