Branch: refs/heads/next
Home: https://github.com/siemens/jailhouse
Commit: ce10986e6637076778fa9a94968b7779d17a56a9
https://github.com/siemens/jailhouse/commit/ce10986e6637076778fa9a94968b7779d17a56a9
Author: Peng Fan <[email protected]>
Date: 2020-08-19 (Wed, 19 Aug 2020)
Changed paths:
M hypervisor/arch/arm64/entry.S
Log Message:
-----------
arm64: mitigate Straight-line Speculation
>From Linux Kernel
commit 679db70801da ("arm64: entry: Place an SB sequence following an ERET
instruction")
"
Some CPUs can speculate past an ERET instruction and potentially perform
speculative accesses to memory before processing the exception return.
Since the register state is often controlled by a lower privilege level
at the point of an ERET, this could potentially be used as part of a
side-channel attack.
"
Use Speculation barrier sequences:
- SB
- DSB followed by ISB
Since we not have ARMv8.5 with SB extension hardware, so only
use the 2nd approach now.
Signed-off-by: Peng Fan <[email protected]>
Signed-off-by: Jan Kiszka <[email protected]>
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