I have good news.
I now have a Linux system on an Intel NUC8I7 with IOMMU support!.
The hardware check of Jalihouse works and I was able to create a
configuration for the root cell with "jailhouse config create nuc8i7.c".
(I've attached this configuration.)
I inserted this cell configuration into the Yocto build system and the file
"nuc8i7.cell" is created and installed under "/usr/share/jailhouse/cells".
In order to start Jailhouse with "jailhouse enable nuc8i7.cell" I extended
the Linux command line with:
intel_iommu=off memmap=0x5200000$0x3a000000
I took the entry "memmap = ..." from the generated configuration "nuc8i7.c".
While re-booting the system it gets stuck with the following message:
Kernel panic - System is deadlocked on memory
The kernel parameter "memmap = ..." should actually work, because 82M of
the following area is reserved:
/* MemRegion: 00100000-39ffffff : System RAM */
{
.phys_start = 0x100000,
.virt_start = 0x100000,
.size = 0x39f00000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA,
}
What could I do?
Best regards
Jan.
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/*
* Jailhouse, a Linux-based partitioning hypervisor
*
* Copyright (c) Siemens AG, 2014-2017
*
* This work is licensed under the terms of the GNU GPL, version 2. See
* the COPYING file in the top-level directory.
*
* Alternatively, you can use or redistribute this file under the following
* BSD license:
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
* THE POSSIBILITY OF SUCH DAMAGE.
*
* Configuration for Intel(R) Client Systems NUC8i7BEH
* created with '/usr/libexec/jailhouse/jailhouse config create nuc8i7.c'
*
* NOTE: This config expects the following to be appended to your kernel cmdline
* "memmap=0x5200000$0x3a000000"
*/
#include <jailhouse/types.h>
#include <jailhouse/cell-config.h>
struct {
struct jailhouse_system header;
__u64 cpus[1];
struct jailhouse_memory mem_regions[48];
struct jailhouse_irqchip irqchips[1];
struct jailhouse_pio pio_regions[10];
struct jailhouse_pci_device pci_devices[20];
struct jailhouse_pci_capability pci_caps[76];
} __attribute__((packed)) config = {
.header = {
.signature = JAILHOUSE_SYSTEM_SIGNATURE,
.revision = JAILHOUSE_CONFIG_REVISION,
.flags = JAILHOUSE_SYS_VIRTUAL_DEBUG_CONSOLE,
.hypervisor_memory = {
.phys_start = 0x3a000000,
.size = 0x600000,
},
.debug_console = {
.address = 0x3f8,
.type = JAILHOUSE_CON_TYPE_8250,
.flags = JAILHOUSE_CON_ACCESS_PIO |
JAILHOUSE_CON_REGDIST_1,
},
.platform_info = {
.pci_mmconfig_base = 0xe0000000,
.pci_mmconfig_end_bus = 0xff,
.iommu_units = {
{
.type = JAILHOUSE_IOMMU_INTEL,
.base = 0xfed90000,
.size = 0x1000,
},
{
.type = JAILHOUSE_IOMMU_INTEL,
.base = 0xfed91000,
.size = 0x1000,
},
},
.x86 = {
.pm_timer_address = 0x1808,
.vtd_interrupt_limit = 256,
},
},
.root_cell = {
.name = "RootCell",
.cpu_set_size = sizeof(config.cpus),
.num_memory_regions = ARRAY_SIZE(config.mem_regions),
.num_irqchips = ARRAY_SIZE(config.irqchips),
.num_pio_regions = ARRAY_SIZE(config.pio_regions),
.num_pci_devices = ARRAY_SIZE(config.pci_devices),
.num_pci_caps = ARRAY_SIZE(config.pci_caps),
},
},
.cpus = {
0x00000000000000ff,
},
.mem_regions = {
/* MemRegion: 00000000-0005efff : System RAM */
{
.phys_start = 0x0,
.virt_start = 0x0,
.size = 0x5f000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA,
},
/* MemRegion: 00060000-0009ffff : System RAM */
{
.phys_start = 0x60000,
.virt_start = 0x60000,
.size = 0x40000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA,
},
/* MemRegion: 00100000-39ffffff : System RAM */
{
.phys_start = 0x100000,
.virt_start = 0x100000,
.size = 0x39f00000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA,
},
/* MemRegion: 3f200000-79959fff : System RAM */
{
.phys_start = 0x3f200000,
.virt_start = 0x3f200000,
.size = 0x3a75a000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA,
},
/* MemRegion: 79dc4000-79e40fff : ACPI Tables */
{
.phys_start = 0x79dc4000,
.virt_start = 0x79dc4000,
.size = 0x7d000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 79e41000-7a274fff : ACPI Non-volatile Storage */
{
.phys_start = 0x79e41000,
.virt_start = 0x79e41000,
.size = 0x434000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 7ab53000-7ac0dfff : Unknown E820 type */
{
.phys_start = 0x7ab53000,
.virt_start = 0x7ab53000,
.size = 0xbb000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 7ac0e000-7ac0efff : System RAM */
{
.phys_start = 0x7ac0e000,
.virt_start = 0x7ac0e000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA,
},
/* MemRegion: 80000000-8fffffff : 0000:00:02.0 */
{
.phys_start = 0x80000000,
.virt_start = 0x80000000,
.size = 0x10000000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: bf000000-bfffffff : 0000:00:02.0 */
{
.phys_start = 0xbf000000,
.virt_start = 0xbf000000,
.size = 0x1000000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: c0000000-c0000fff : 0000:6e:00.0 */
{
.phys_start = 0xc0000000,
.virt_start = 0xc0000000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: c0a00000-c0a01fff : nvme */
{
.phys_start = 0xc0a00000,
.virt_start = 0xc0a00000,
.size = 0x2000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: c0a03000-c0a03fff : nvme */
{
.phys_start = 0xc0a03000,
.virt_start = 0xc0a03000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: c0b00000-c0b1ffff : e1000e */
{
.phys_start = 0xc0b00000,
.virt_start = 0xc0b00000,
.size = 0x20000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: c0b20000-c0b23fff : ICH HD audio */
{
.phys_start = 0xc0b20000,
.virt_start = 0xc0b20000,
.size = 0x4000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: c0b24000-c0b25fff : ahci */
{
.phys_start = 0xc0b24000,
.virt_start = 0xc0b24000,
.size = 0x2000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: c0b26000-c0b267ff : ahci */
{
.phys_start = 0xc0b26000,
.virt_start = 0xc0b26000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: c0b27000-c0b270ff : ahci */
{
.phys_start = 0xc0b27000,
.virt_start = 0xc0b27000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: fd000000-fd69ffff : pnp 00:05 */
{
.phys_start = 0xfd000000,
.virt_start = 0xfd000000,
.size = 0x6a0000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: fd6a0000-fd6affff : INT34BB:00 INT34BB:00 */
{
.phys_start = 0xfd6a0000,
.virt_start = 0xfd6a0000,
.size = 0x10000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: fd6b0000-fd6cffff : pnp 00:05 */
{
.phys_start = 0xfd6b0000,
.virt_start = 0xfd6b0000,
.size = 0x20000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: fd6d0000-fd6dffff : INT34BB:00 INT34BB:00 */
{
.phys_start = 0xfd6d0000,
.virt_start = 0xfd6d0000,
.size = 0x10000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: fd6e0000-fd6effff : INT34BB:00 INT34BB:00 */
{
.phys_start = 0xfd6e0000,
.virt_start = 0xfd6e0000,
.size = 0x10000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: fd6f0000-fdffffff : pnp 00:05 */
{
.phys_start = 0xfd6f0000,
.virt_start = 0xfd6f0000,
.size = 0x910000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: fe200000-fe7fffff : pnp 00:05 */
{
.phys_start = 0xfe200000,
.virt_start = 0xfe200000,
.size = 0x600000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: fed00000-fed003ff : HPET 0 */
{
.phys_start = 0xfed00000,
.virt_start = 0xfed00000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: fed10000-fed17fff : pnp 00:04 */
{
.phys_start = 0xfed10000,
.virt_start = 0xfed10000,
.size = 0x8000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: fed18000-fed18fff : pnp 00:04 */
{
.phys_start = 0xfed18000,
.virt_start = 0xfed18000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: fed19000-fed19fff : pnp 00:04 */
{
.phys_start = 0xfed19000,
.virt_start = 0xfed19000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: fed20000-fed3ffff : pnp 00:04 */
{
.phys_start = 0xfed20000,
.virt_start = 0xfed20000,
.size = 0x20000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: fed45000-fed8ffff : pnp 00:04 */
{
.phys_start = 0xfed45000,
.virt_start = 0xfed45000,
.size = 0x4b000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 100000000-4eedfffff : System RAM */
{
.phys_start = 0x100000000,
.virt_start = 0x100000000,
.size = 0x3eee00000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA,
},
/* MemRegion: 4eee00000-4f0ffffff : Kernel */
{
.phys_start = 0x4eee00000,
.virt_start = 0x4eee00000,
.size = 0x2200000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA,
},
/* MemRegion: 4f1000000-87dffffff : System RAM */
{
.phys_start = 0x4f1000000,
.virt_start = 0x4f1000000,
.size = 0x38d000000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA,
},
/* MemRegion: 87e000000-87fffffff : RAM buffer */
{
.phys_start = 0x87e000000,
.virt_start = 0x87e000000,
.size = 0x2000000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA,
},
/* MemRegion: 404ab00000-404abfffff : ICH HD audio */
{
.phys_start = 0x404ab00000,
.virt_start = 0x404ab00000,
.size = 0x100000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 404ac00000-404ac0ffff : xhci-hcd */
{
.phys_start = 0x404ac00000,
.virt_start = 0x404ac00000,
.size = 0x10000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 404ac10000-404ac11fff : iwlwifi */
{
.phys_start = 0x404ac10000,
.virt_start = 0x404ac10000,
.size = 0x2000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 404ac13000-404ac13fff : iwlwifi */
{
.phys_start = 0x404ac13000,
.virt_start = 0x404ac13000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 404ac14000-404ac15fff : 0000:00:14.2 */
{
.phys_start = 0x404ac14000,
.virt_start = 0x404ac14000,
.size = 0x2000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 404ac16000-404ac160ff : 0000:00:1f.4 */
{
.phys_start = 0x404ac16000,
.virt_start = 0x404ac16000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 404ac17000-404ac17fff : mei_me */
{
.phys_start = 0x404ac17000,
.virt_start = 0x404ac17000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 404ac18000-404ac18fff : 0000:00:14.2 */
{
.phys_start = 0x404ac18000,
.virt_start = 0x404ac18000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 404ac19000-404ac19fff : 0000:00:12.0 */
{
.phys_start = 0x404ac19000,
.virt_start = 0x404ac19000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 404ac1a000-404ac1afff : 0000:00:08.0 */
{
.phys_start = 0x404ac1a000,
.virt_start = 0x404ac1a000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 7a738000-7a981fff : ACPI DMAR RMRR */
/* PCI device: 00:14.0 */
{
.phys_start = 0x7a738000,
.virt_start = 0x7a738000,
.size = 0x24a000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA,
},
/* MemRegion: 7b800000-7fffffff : ACPI DMAR RMRR */
/* PCI device: 00:02.0 */
{
.phys_start = 0x7b800000,
.virt_start = 0x7b800000,
.size = 0x4800000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA,
},
/* MemRegion: 3a600000-3f1fffff : JAILHOUSE Inmate Memory */
{
.phys_start = 0x3a600000,
.virt_start = 0x3a600000,
.size = 0x4c00000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
},
.irqchips = {
/* IOAPIC 2, GSI base 0 */
{
.address = 0xfec00000,
.id = 0x100f7,
.pin_bitmap = {
0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
},
},
},
.pio_regions = {
/* Port I/O: 0000-001f : dma1 */
/* PIO_RANGE(0x0, 0x20), */
/* Port I/O: 0020-0021 : pic1 */
/* PIO_RANGE(0x20, 0x2), */
/* Port I/O: 0040-0043 : timer0 */
PIO_RANGE(0x40, 0x4),
/* Port I/O: 0050-0053 : timer1 */
/* PIO_RANGE(0x50, 0x4), */
/* Port I/O: 0060-0060 : keyboard */
PIO_RANGE(0x60, 0x1),
/* Port I/O: 0062-0062 : EC data */
/* PIO_RANGE(0x62, 0x1), */
/* Port I/O: 0064-0064 : keyboard */
PIO_RANGE(0x64, 0x1),
/* Port I/O: 0066-0066 : EC cmd */
/* PIO_RANGE(0x66, 0x1), */
/* Port I/O: 0070-0077 : rtc0 */
PIO_RANGE(0x70, 0x8),
/* Port I/O: 0080-008f : dma page reg */
/* PIO_RANGE(0x80, 0x10), */
/* Port I/O: 00a0-00a1 : pic2 */
/* PIO_RANGE(0xa0, 0x2), */
/* Port I/O: 00c0-00df : dma2 */
/* PIO_RANGE(0xc0, 0x20), */
/* Port I/O: 00f0-00ff : fpu */
/* PIO_RANGE(0xf0, 0x10), */
/* Port I/O: 0400-041f : iTCO_wdt */
/* PIO_RANGE(0x400, 0x20), */
/* Port I/O: 0680-069f : pnp 00:01 */
/* PIO_RANGE(0x680, 0x20), */
/* Port I/O: 0a00-0a1f : pnp 00:00 */
/* PIO_RANGE(0xa00, 0x20), */
/* Port I/O: 0a20-0a2f : pnp 00:00 */
/* PIO_RANGE(0xa20, 0x10), */
/* Port I/O: 0a30-0a3f : pnp 00:00 */
/* PIO_RANGE(0xa30, 0x10), */
/* Port I/O: 0a40-0a4f : pnp 00:00 */
/* PIO_RANGE(0xa40, 0x10), */
/* Port I/O: 0a50-0a5f : pnp 00:00 */
/* PIO_RANGE(0xa50, 0x10), */
/* Port I/O: 0a60-0a6f : pnp 00:00 */
/* PIO_RANGE(0xa60, 0x10), */
/* Port I/O: 4000-4007 : 0000:6d:00.0 */
PIO_RANGE(0x4000, 0x8),
/* Port I/O: 5000-503f : 0000:00:02.0 */
PIO_RANGE(0x5000, 0x40),
/* Port I/O: 5060-507f : 0000:00:17.0 */
PIO_RANGE(0x5060, 0x20),
/* Port I/O: 5080-5083 : 0000:00:17.0 */
PIO_RANGE(0x5080, 0x4),
/* Port I/O: 5090-5097 : 0000:00:17.0 */
PIO_RANGE(0x5090, 0x8),
/* Port I/O: efa0-efbf : 0000:00:1f.4 */
PIO_RANGE(0xefa0, 0x20),
},
.pci_devices = {
/* PCIDevice: 00:00.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 1,
.domain = 0x0,
.bdf = 0x0,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 1,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:02.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 0,
.domain = 0x0,
.bdf = 0x10,
.bar_mask = {
0xff000000, 0xffffffff, 0xf0000000,
0xffffffff, 0xffffffc0, 0x00000000,
},
.caps_start = 1,
.num_caps = 7,
.num_msi_vectors = 1,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:08.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 1,
.domain = 0x0,
.bdf = 0x40,
.bar_mask = {
0xfffff000, 0xffffffff, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 8,
.num_caps = 3,
.num_msi_vectors = 1,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:12.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 1,
.domain = 0x0,
.bdf = 0x90,
.bar_mask = {
0xfffff000, 0xffffffff, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 11,
.num_caps = 2,
.num_msi_vectors = 1,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:14.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 1,
.domain = 0x0,
.bdf = 0xa0,
.bar_mask = {
0xffff0000, 0xffffffff, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 13,
.num_caps = 3,
.num_msi_vectors = 8,
.msi_64bits = 1,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:14.2 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 1,
.domain = 0x0,
.bdf = 0xa2,
.bar_mask = {
0xffffe000, 0xffffffff, 0xfffff000,
0xffffffff, 0x00000000, 0x00000000,
},
.caps_start = 16,
.num_caps = 1,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:14.3 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 1,
.domain = 0x0,
.bdf = 0xa3,
.bar_mask = {
0xffffc000, 0xffffffff, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 17,
.num_caps = 7,
.num_msi_vectors = 1,
.msi_64bits = 1,
.msi_maskable = 0,
.num_msix_vectors = 16,
.msix_region_size = 0x1000,
.msix_address = 0x404ac12000,
},
/* PCIDevice: 00:16.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 1,
.domain = 0x0,
.bdf = 0xb0,
.bar_mask = {
0xfffff000, 0xffffffff, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 24,
.num_caps = 3,
.num_msi_vectors = 1,
.msi_64bits = 1,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:17.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 1,
.domain = 0x0,
.bdf = 0xb8,
.bar_mask = {
0xffffe000, 0xffffff00, 0xfffffff8,
0xfffffffc, 0xffffffe0, 0xfffff800,
},
.caps_start = 27,
.num_caps = 3,
.num_msi_vectors = 1,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:1c.0 */
{
.type = JAILHOUSE_PCI_TYPE_BRIDGE,
.iommu = 1,
.domain = 0x0,
.bdf = 0xe0,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 30,
.num_caps = 5,
.num_msi_vectors = 1,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:1c.4 */
{
.type = JAILHOUSE_PCI_TYPE_BRIDGE,
.iommu = 1,
.domain = 0x0,
.bdf = 0xe4,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 35,
.num_caps = 9,
.num_msi_vectors = 1,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:1d.0 */
{
.type = JAILHOUSE_PCI_TYPE_BRIDGE,
.iommu = 1,
.domain = 0x0,
.bdf = 0xe8,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 44,
.num_caps = 10,
.num_msi_vectors = 1,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:1d.6 */
{
.type = JAILHOUSE_PCI_TYPE_BRIDGE,
.iommu = 1,
.domain = 0x0,
.bdf = 0xee,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 44,
.num_caps = 10,
.num_msi_vectors = 1,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:1f.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 1,
.domain = 0x0,
.bdf = 0xf8,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:1f.3 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 1,
.domain = 0x0,
.bdf = 0xfb,
.bar_mask = {
0xffffc000, 0xffffffff, 0x00000000,
0x00000000, 0xfff00000, 0xffffffff,
},
.caps_start = 54,
.num_caps = 3,
.num_msi_vectors = 1,
.msi_64bits = 1,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:1f.4 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 1,
.domain = 0x0,
.bdf = 0xfc,
.bar_mask = {
0xffffff00, 0xffffffff, 0x00000000,
0x00000000, 0xffffffe0, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:1f.5 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 1,
.domain = 0x0,
.bdf = 0xfd,
.bar_mask = {
0xfffff000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:1f.6 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 1,
.domain = 0x0,
.bdf = 0xfe,
.bar_mask = {
0xfffe0000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 57,
.num_caps = 2,
.num_msi_vectors = 1,
.msi_64bits = 1,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 6d:00.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 1,
.domain = 0x0,
.bdf = 0x6d00,
.bar_mask = {
0xffffc000, 0xffffffff, 0xfffffff8,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 59,
.num_caps = 10,
.num_msi_vectors = 8,
.msi_64bits = 1,
.msi_maskable = 0,
.num_msix_vectors = 9,
.msix_region_size = 0x1000,
.msix_address = 0xc0a02000,
},
/* PCIDevice: 6e:00.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 1,
.domain = 0x0,
.bdf = 0x6e00,
.bar_mask = {
0xfffff000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 69,
.num_caps = 7,
.num_msi_vectors = 1,
.msi_64bits = 1,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
},
.pci_caps = {
/* PCIDevice: 00:00.0 */
{
.id = PCI_CAP_ID_VNDR,
.start = 0xe0,
.len = 0x2,
.flags = 0,
},
/* PCIDevice: 00:02.0 */
{
.id = PCI_CAP_ID_VNDR,
.start = 0x40,
.len = 0x2,
.flags = 0,
},
{
.id = PCI_CAP_ID_EXP,
.start = 0x70,
.len = 0x3c,
.flags = 0,
},
{
.id = PCI_CAP_ID_MSI,
.start = 0xac,
.len = 0xa,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_CAP_ID_PM,
.start = 0xd0,
.len = 0x8,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_EXT_CAP_ID_PASID | JAILHOUSE_PCI_EXT_CAP,
.start = 0x100,
.len = 0x8,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_ATS | JAILHOUSE_PCI_EXT_CAP,
.start = 0x200,
.len = 0x4,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_PRI | JAILHOUSE_PCI_EXT_CAP,
.start = 0x300,
.len = 0x4,
.flags = 0,
},
/* PCIDevice: 00:08.0 */
{
.id = PCI_CAP_ID_MSI,
.start = 0x90,
.len = 0xa,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_CAP_ID_PM,
.start = 0xdc,
.len = 0x8,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_CAP_ID_AF,
.start = 0xf0,
.len = 0x2,
.flags = 0,
},
/* PCIDevice: 00:12.0 */
{
.id = PCI_CAP_ID_PM,
.start = 0x50,
.len = 0x8,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_CAP_ID_MSI,
.start = 0x80,
.len = 0xa,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
/* PCIDevice: 00:14.0 */
{
.id = PCI_CAP_ID_PM,
.start = 0x70,
.len = 0x8,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_CAP_ID_MSI,
.start = 0x80,
.len = 0xe,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_CAP_ID_VNDR,
.start = 0x90,
.len = 0x2,
.flags = 0,
},
/* PCIDevice: 00:14.2 */
{
.id = PCI_CAP_ID_PM,
.start = 0x80,
.len = 0x8,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
/* PCIDevice: 00:14.3 */
{
.id = PCI_CAP_ID_PM,
.start = 0xc8,
.len = 0x8,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_CAP_ID_MSI,
.start = 0xd0,
.len = 0xe,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_CAP_ID_EXP,
.start = 0x40,
.len = 0x3c,
.flags = 0,
},
{
.id = PCI_CAP_ID_MSIX,
.start = 0x80,
.len = 0xc,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = 0x0 | JAILHOUSE_PCI_EXT_CAP,
.start = 0x100,
.len = 0x4,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_LTR | JAILHOUSE_PCI_EXT_CAP,
.start = 0x14c,
.len = 0x8,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_VNDR | JAILHOUSE_PCI_EXT_CAP,
.start = 0x164,
.len = 0x18,
.flags = 0,
},
/* PCIDevice: 00:16.0 */
{
.id = PCI_CAP_ID_PM,
.start = 0x50,
.len = 0x8,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_CAP_ID_MSI,
.start = 0x8c,
.len = 0xe,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_CAP_ID_VNDR,
.start = 0xa4,
.len = 0x2,
.flags = 0,
},
/* PCIDevice: 00:17.0 */
{
.id = PCI_CAP_ID_MSI,
.start = 0x80,
.len = 0xa,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_CAP_ID_PM,
.start = 0x70,
.len = 0x8,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_CAP_ID_SATA,
.start = 0xa8,
.len = 0x2,
.flags = 0,
},
/* PCIDevice: 00:1c.0 */
{
.id = PCI_CAP_ID_EXP,
.start = 0x40,
.len = 0x3c,
.flags = 0,
},
{
.id = PCI_CAP_ID_MSI,
.start = 0x80,
.len = 0xa,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_CAP_ID_SSVID,
.start = 0x90,
.len = 0x2,
.flags = 0,
},
{
.id = PCI_CAP_ID_PM,
.start = 0xa0,
.len = 0x8,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = 0x0 | JAILHOUSE_PCI_EXT_CAP,
.start = 0x100,
.len = 0x4,
.flags = 0,
},
/* PCIDevice: 00:1c.4 */
{
.id = PCI_CAP_ID_EXP,
.start = 0x40,
.len = 0x3c,
.flags = 0,
},
{
.id = PCI_CAP_ID_MSI,
.start = 0x80,
.len = 0xa,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_CAP_ID_SSVID,
.start = 0x90,
.len = 0x2,
.flags = 0,
},
{
.id = PCI_CAP_ID_PM,
.start = 0xa0,
.len = 0x8,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_EXT_CAP_ID_ERR | JAILHOUSE_PCI_EXT_CAP,
.start = 0x100,
.len = 0x40,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_ACS | JAILHOUSE_PCI_EXT_CAP,
.start = 0x140,
.len = 0x8,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_PTM | JAILHOUSE_PCI_EXT_CAP,
.start = 0x150,
.len = 0xc,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_SECPCI | JAILHOUSE_PCI_EXT_CAP,
.start = 0x220,
.len = 0x10,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_DPC | JAILHOUSE_PCI_EXT_CAP,
.start = 0x250,
.len = 0x4,
.flags = 0,
},
/* PCIDevice: 00:1d.0 */
/* PCIDevice: 00:1d.6 */
{
.id = PCI_CAP_ID_EXP,
.start = 0x40,
.len = 0x3c,
.flags = 0,
},
{
.id = PCI_CAP_ID_MSI,
.start = 0x80,
.len = 0xa,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_CAP_ID_SSVID,
.start = 0x90,
.len = 0x2,
.flags = 0,
},
{
.id = PCI_CAP_ID_PM,
.start = 0xa0,
.len = 0x8,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_EXT_CAP_ID_ERR | JAILHOUSE_PCI_EXT_CAP,
.start = 0x100,
.len = 0x40,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_ACS | JAILHOUSE_PCI_EXT_CAP,
.start = 0x140,
.len = 0x8,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_PTM | JAILHOUSE_PCI_EXT_CAP,
.start = 0x150,
.len = 0xc,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_L1SS | JAILHOUSE_PCI_EXT_CAP,
.start = 0x200,
.len = 0x4,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_SECPCI | JAILHOUSE_PCI_EXT_CAP,
.start = 0x220,
.len = 0x10,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_DPC | JAILHOUSE_PCI_EXT_CAP,
.start = 0x250,
.len = 0x4,
.flags = 0,
},
/* PCIDevice: 00:1f.3 */
{
.id = PCI_CAP_ID_PM,
.start = 0x50,
.len = 0x8,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_CAP_ID_VNDR,
.start = 0x80,
.len = 0x2,
.flags = 0,
},
{
.id = PCI_CAP_ID_MSI,
.start = 0x60,
.len = 0xe,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
/* PCIDevice: 00:1f.6 */
{
.id = PCI_CAP_ID_PM,
.start = 0xc8,
.len = 0x8,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_CAP_ID_MSI,
.start = 0xd0,
.len = 0xe,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
/* PCIDevice: 6d:00.0 */
{
.id = PCI_CAP_ID_EXP,
.start = 0x80,
.len = 0x3c,
.flags = 0,
},
{
.id = PCI_CAP_ID_MSIX,
.start = 0xd0,
.len = 0xc,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_CAP_ID_MSI,
.start = 0xe0,
.len = 0xe,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_CAP_ID_PM,
.start = 0xf8,
.len = 0x8,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_EXT_CAP_ID_VNDR | JAILHOUSE_PCI_EXT_CAP,
.start = 0x100,
.len = 0xc,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_LTR | JAILHOUSE_PCI_EXT_CAP,
.start = 0x108,
.len = 0x8,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_L1SS | JAILHOUSE_PCI_EXT_CAP,
.start = 0x110,
.len = 0x4,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_ARI | JAILHOUSE_PCI_EXT_CAP,
.start = 0x128,
.len = 0x8,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_ERR | JAILHOUSE_PCI_EXT_CAP,
.start = 0x200,
.len = 0x40,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_SECPCI | JAILHOUSE_PCI_EXT_CAP,
.start = 0x300,
.len = 0x10,
.flags = 0,
},
/* PCIDevice: 6e:00.0 */
{
.id = PCI_CAP_ID_PM,
.start = 0x40,
.len = 0x8,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_CAP_ID_MSI,
.start = 0x50,
.len = 0xe,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_CAP_ID_EXP,
.start = 0x70,
.len = 0x3c,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_ERR | JAILHOUSE_PCI_EXT_CAP,
.start = 0x100,
.len = 0x40,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_DSN | JAILHOUSE_PCI_EXT_CAP,
.start = 0x140,
.len = 0xc,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_LTR | JAILHOUSE_PCI_EXT_CAP,
.start = 0x150,
.len = 0x8,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_L1SS | JAILHOUSE_PCI_EXT_CAP,
.start = 0x158,
.len = 0x4,
.flags = 0,
},
},
};
