From: Jan Kiszka <[email protected]>

None of the callers checks it, and all of the callers ensure that only
SGI IDs are passed.

Signed-off-by: Jan Kiszka <[email protected]>
---
 hypervisor/arch/arm-common/gic-v2.c              | 7 +------
 hypervisor/arch/arm-common/gic-v3.c              | 7 +------
 hypervisor/arch/arm-common/include/asm/irqchip.h | 4 ++--
 hypervisor/arch/arm-common/irqchip.c             | 4 ++--
 4 files changed, 6 insertions(+), 16 deletions(-)

diff --git a/hypervisor/arch/arm-common/gic-v2.c 
b/hypervisor/arch/arm-common/gic-v2.c
index b63b0fbc..c5ad0607 100644
--- a/hypervisor/arch/arm-common/gic-v2.c
+++ b/hypervisor/arch/arm-common/gic-v2.c
@@ -264,20 +264,15 @@ static void gicv2_adjust_irq_target(struct cell *cell, 
u16 irq_id)
        mmio_write32(itargetsr, targets);
 }

-static int gicv2_send_sgi(struct sgi *sgi)
+static void gicv2_send_sgi(struct sgi *sgi)
 {
        u32 val;

-       if (!is_sgi(sgi->id))
-               return -EINVAL;
-
        val = (sgi->routing_mode & 0x3) << 24
                | (sgi->targets & 0xff) << 16
                | (sgi->id & 0xf);

        mmio_write32(gicd_base + GICD_SGIR, val);
-
-       return 0;
 }

 static int gicv2_inject_irq(u16 irq_id, u16 sender)
diff --git a/hypervisor/arch/arm-common/gic-v3.c 
b/hypervisor/arch/arm-common/gic-v3.c
index 584c2c79..949c4598 100644
--- a/hypervisor/arch/arm-common/gic-v3.c
+++ b/hypervisor/arch/arm-common/gic-v3.c
@@ -414,14 +414,11 @@ static int gicv3_cell_init(struct cell *cell)
        (MPIDR_AFFINITY_LEVEL((cluster_id), (level)) \
        << ICC_SGIR_AFF## level ##_SHIFT)

-static int gicv3_send_sgi(struct sgi *sgi)
+static void gicv3_send_sgi(struct sgi *sgi)
 {
        u64 val;
        u16 targets = sgi->targets;

-       if (!is_sgi(sgi->id))
-               return -EINVAL;
-
        if (sgi->routing_mode == 2)
                targets = 1 << phys_processor_id();

@@ -442,8 +439,6 @@ static int gicv3_send_sgi(struct sgi *sgi)

        arm_write_sysreg(ICC_SGI1R_EL1, val);
        isb();
-
-       return 0;
 }

 #define SGIR_TO_AFFINITY(sgir, level)  \
diff --git a/hypervisor/arch/arm-common/include/asm/irqchip.h 
b/hypervisor/arch/arm-common/include/asm/irqchip.h
index 20e65b62..06401f91 100644
--- a/hypervisor/arch/arm-common/include/asm/irqchip.h
+++ b/hypervisor/arch/arm-common/include/asm/irqchip.h
@@ -46,7 +46,7 @@ struct irqchip {
        void    (*cell_exit)(struct cell *cell);
        void    (*adjust_irq_target)(struct cell *cell, u16 irq_id);

-       int     (*send_sgi)(struct sgi *sgi);
+       void    (*send_sgi)(struct sgi *sgi);
        u32     (*read_iar_irqn)(void);
        void    (*eoi_irq)(u32 irqn, bool deactivate);
        int     (*inject_irq)(u16 irq_id, u16 sender);
@@ -89,7 +89,7 @@ void irqchip_cell_reset(struct cell *cell);

 void irqchip_config_commit(struct cell *cell_added_removed);

-int irqchip_send_sgi(unsigned int cpu_id, u16 sgi_id);
+void irqchip_send_sgi(unsigned int cpu_id, u16 sgi_id);
 void irqchip_handle_irq(void);

 bool irqchip_has_pending_irqs(void);
diff --git a/hypervisor/arch/arm-common/irqchip.c 
b/hypervisor/arch/arm-common/irqchip.c
index c50ea18a..eb9ac40f 100644
--- a/hypervisor/arch/arm-common/irqchip.c
+++ b/hypervisor/arch/arm-common/irqchip.c
@@ -304,7 +304,7 @@ void irqchip_trigger_external_irq(u16 irq_id)
                     1 << (irq_id % 32));
 }

-int irqchip_send_sgi(unsigned int cpu_id, u16 sgi_id)
+void irqchip_send_sgi(unsigned int cpu_id, u16 sgi_id)
 {
        struct sgi sgi;

@@ -312,7 +312,7 @@ int irqchip_send_sgi(unsigned int cpu_id, u16 sgi_id)
        sgi.cluster_id = irqchip_get_cluster_target(cpu_id);
        sgi.routing_mode = 0;
        sgi.id = sgi_id;
-       return irqchip.send_sgi(&sgi);
+       irqchip.send_sgi(&sgi);
 }

 int irqchip_cpu_init(struct per_cpu *cpu_data)
--
2.26.2

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