Branch: refs/heads/wip/arm64-zero-exits
Home: https://github.com/siemens/jailhouse
Commit: 017849c053d6deeb6c8ad73ba9c78dd4cbfe52b6
https://github.com/siemens/jailhouse/commit/017849c053d6deeb6c8ad73ba9c78dd4cbfe52b6
Author: Jan Kiszka <[email protected]>
Date: 2020-09-29 (Tue, 29 Sep 2020)
Changed paths:
M hypervisor/arch/arm-common/gic-v2.c
Log Message:
-----------
arm-common: Reorder gicv2_cpu_init
This pulls CPU ID validation and gicv2_target_cpu_map setup to the
beginning of gicv2_cpu_init so that we can fail early if needed, before
any changes to the hardware configuration are made. This will also help
when introducing SDEI-based management interrupts.
Signed-off-by: Jan Kiszka <[email protected]>
Commit: cfa14c2cf25baf7362c8c17bccb870e25f9b92f7
https://github.com/siemens/jailhouse/commit/cfa14c2cf25baf7362c8c17bccb870e25f9b92f7
Author: Jan Kiszka <[email protected]>
Date: 2020-09-29 (Tue, 29 Sep 2020)
Changed paths:
M hypervisor/arch/arm-common/smccc.c
M hypervisor/arch/arm/include/asm/smc.h
M hypervisor/arch/arm64/include/asm/smc.h
Log Message:
-----------
arm/arm64: Expand return type of smc helpers to long
This allows to evaluate all 64 bits on arm64. Will be needed for SDEI.
Signed-off-by: Jan Kiszka <[email protected]>
Commit: d879ab5c499557bba37d265d700ab2f3c1731e66
https://github.com/siemens/jailhouse/commit/d879ab5c499557bba37d265d700ab2f3c1731e66
Author: Jan Kiszka <[email protected]>
Date: 2020-09-29 (Tue, 29 Sep 2020)
Changed paths:
M hypervisor/arch/arm/include/asm/smc.h
M hypervisor/arch/arm64/include/asm/smc.h
Log Message:
-----------
arm/arm64: Add further smc helpers
Will be used for SDEI. Actually not on ARM, but we add the smc_arg2 to
please the build and avoid surprises once it is used for real.
Signed-off-by: Jan Kiszka <[email protected]>
Commit: fe7b84e53f502941eff25689354e8c86f989959d
https://github.com/siemens/jailhouse/commit/fe7b84e53f502941eff25689354e8c86f989959d
Author: Jan Kiszka <[email protected]>
Date: 2020-09-29 (Tue, 29 Sep 2020)
Changed paths:
M hypervisor/arch/arm64/setup.c
Log Message:
-----------
arm64: Reorder arch_cpu_init
This will allow to modify the hcr value based on the result of
arm_cpu_init when SDEI is in play.
Signed-off-by: Jan Kiszka <[email protected]>
Commit: c9e53e144917df626cbea302c0c10d91d5ded2cc
https://github.com/siemens/jailhouse/commit/c9e53e144917df626cbea302c0c10d91d5ded2cc
Author: Jan Kiszka <[email protected]>
Date: 2020-09-29 (Tue, 29 Sep 2020)
Changed paths:
M hypervisor/arch/arm-common/control.c
M hypervisor/arch/arm-common/include/asm/smccc.h
M hypervisor/arch/arm-common/irqchip.c
M hypervisor/arch/arm-common/smccc.c
Log Message:
-----------
arm-common: Add SDEI-based management event injection support
This is the first building block for switching to management interrupts
using the Software Delegated Exception Interface (SDEI) which will allow
to pass the GICC to the guest.
In this step, the feature flag is introduced - but not yet set -, and
arch_send_event is augmented with sending the event via
SDEI_EVENT_SIGNAL, software event 0.
Signed-off-by: Jan Kiszka <[email protected]>
Commit: 3922f5f7d90792ff59c97bebca85e18e3b0436e1
https://github.com/siemens/jailhouse/commit/3922f5f7d90792ff59c97bebca85e18e3b0436e1
Author: Jan Kiszka <[email protected]>
Date: 2020-09-29 (Tue, 29 Sep 2020)
Changed paths:
M hypervisor/arch/arm-common/gic-v2.c
M hypervisor/arch/arm-common/gic-v3.c
M hypervisor/arch/arm-common/irqchip.c
Log Message:
-----------
arm-common: Pass through GIC CPU interface in SDEI mode
When SDEI is used for management interrupts, we can give the gicc
completely to the cell. This requires to skip gic-v2 and gic-v3 per-cpu
initializations and to map the physical gicc-v2 into the cell or to not
enable ICH_HCR_EN in case of gic-v3. Furthermore, injected interrupts
now have to be sent as physical SGI to the target, rather than being
queued for the virtual interface.
Signed-off-by: Jan Kiszka <[email protected]>
Commit: da4d75195e260cda57429b5bbe94ea6fd4bd2b27
https://github.com/siemens/jailhouse/commit/da4d75195e260cda57429b5bbe94ea6fd4bd2b27
Author: Jan Kiszka <[email protected]>
Date: 2020-09-29 (Tue, 29 Sep 2020)
Changed paths:
M hypervisor/arch/arm-common/include/asm/smccc.h
M hypervisor/arch/arm64/asm-defines.c
M hypervisor/arch/arm64/entry.S
M hypervisor/arch/arm64/include/asm/entry.h
M hypervisor/arch/arm64/include/asm/percpu_fields.h
M hypervisor/arch/arm64/setup.c
M hypervisor/arch/arm64/traps.c
Log Message:
-----------
arm64: Add SDEI-based management interrupt handling
This brings the arm64-specific bits to handle management interrupts sent
via SDEI.
The pattern for processing them is derived from NMI-based injection on
x86: The SDEI event can come asynchronously at any time while in EL2,
EL1 or EL0. To avoid having to synchronize with running EL2, translate
it into a trap that is triggered on EL1/0 reentry. We use an invalid
VTCR_EL2 value for this and set the per-cpu sdei_event flag. When EL2
finds this flag set on handling the trap, it kicks off SGI_EVENT
handling and restores VTCR_EL2.
Signed-off-by: Jan Kiszka <[email protected]>
Commit: 2c6e24e8c416af70607e6c3316e087a03e1480c3
https://github.com/siemens/jailhouse/commit/2c6e24e8c416af70607e6c3316e087a03e1480c3
Author: Jan Kiszka <[email protected]>
Date: 2020-09-29 (Tue, 29 Sep 2020)
Changed paths:
M hypervisor/arch/arm64/setup.c
Log Message:
-----------
arm64: Do not trap interrupts when using SDEI
They can (and must) be delivered directly to the cell in that mode. GIC
CPU interfaces are already passed through.
Signed-off-by: Jan Kiszka <[email protected]>
Commit: bd276444603bf348041ffe04babacf1c57420881
https://github.com/siemens/jailhouse/commit/bd276444603bf348041ffe04babacf1c57420881
Author: Jan Kiszka <[email protected]>
Date: 2020-09-29 (Tue, 29 Sep 2020)
Changed paths:
M hypervisor/arch/arm-common/psci.c
Log Message:
-----------
arm-common: Improve PSCI documentation
Describe what happens around CPU_SUSPEND and use the official symbolic
return code. Also explain what is (not) returned from CPU_OFF.
No functional changes.
Signed-off-by: Jan Kiszka <[email protected]>
Commit: 4bf9cdd663a670a2faf7991906f3d1d7a159cc5b
https://github.com/siemens/jailhouse/commit/4bf9cdd663a670a2faf7991906f3d1d7a159cc5b
Author: Jan Kiszka <[email protected]>
Date: 2020-09-29 (Tue, 29 Sep 2020)
Changed paths:
M hypervisor/arch/arm-common/include/asm/control.h
M hypervisor/arch/arm-common/psci.c
M hypervisor/arch/arm/control.c
M hypervisor/arch/arm64/control.c
Log Message:
-----------
arm-common: Handle SDEI case in PSCI CPU_SUSPEND
When suspending the CPU while interrupts are passed through, we cannot
simply call wfi as EL2 is not receiving interrupts as wakeup events -
the CPU would starve.
Factor out arm_cpu_passthru_suspend to handle this case by enabling IMO
and FMO before calling wfi. That ensures that EL2 will resume, and as
interrupts are off in that mode, the events will simply be carried to
EL1 when clearing IMO/FMO before returning.
For ARM, arm_cpu_passthru_suspend remains empty as there is no SDEI.
Signed-off-by: Jan Kiszka <[email protected]>
Commit: 13c360e08dec34c916093f60cb2e5eb8a3c19947
https://github.com/siemens/jailhouse/commit/13c360e08dec34c916093f60cb2e5eb8a3c19947
Author: Jan Kiszka <[email protected]>
Date: 2020-09-29 (Tue, 29 Sep 2020)
Changed paths:
M hypervisor/arch/arm-common/include/asm/smccc.h
M hypervisor/arch/arm-common/setup.c
M hypervisor/arch/arm-common/smccc.c
Log Message:
-----------
arm-common: Detect availability of SDEI on arm64
Enhance smccc_discover() to detect if SDEI is available on all CPUs on
arm64. Fail on inconsistent availability, now returning and error code.
SDEI is practically only available on arm64 and also only implemented
there in Jailhouse. So skip the probing on 32-bit.
This activates the previously introduced SDEI paths.
Signed-off-by: Jan Kiszka <[email protected]>
Compare:
https://github.com/siemens/jailhouse/compare/d5f4ec3db4b3...13c360e08dec
--
You received this message because you are subscribed to the Google Groups
"Jailhouse" group.
To unsubscribe from this group and stop receiving emails from it, send an email
to [email protected].
To view this discussion on the web visit
https://groups.google.com/d/msgid/jailhouse-dev/siemens/jailhouse/push/refs/heads/wip/arm64-zero-exits/d5f4ec-13c360%40github.com.
