From: Jan Kiszka <[email protected]> Keep the encode parange value as well. This allows to use it directly in VTCR_CELL, rather than re-encoding it via TCR_PS_CELL. It will also allow reuse by the SMMUv2 code.
Signed-off-by: Jan Kiszka <[email protected]> --- hypervisor/arch/arm64/include/asm/paging.h | 16 ++-------------- hypervisor/arch/arm64/paging.c | 13 ++++++++----- 2 files changed, 10 insertions(+), 19 deletions(-) diff --git a/hypervisor/arch/arm64/include/asm/paging.h b/hypervisor/arch/arm64/include/asm/paging.h index 5713379c..67664efa 100644 --- a/hypervisor/arch/arm64/include/asm/paging.h +++ b/hypervisor/arch/arm64/include/asm/paging.h @@ -177,7 +177,7 @@ struct paging_structures; typedef u64 *pt_entry_t; -extern unsigned int cpu_parange; +extern unsigned int cpu_parange, cpu_parange_encoded; unsigned int get_cpu_parange(void); @@ -193,23 +193,11 @@ unsigned int get_cpu_parange(void); ret; }) /* Just match the host's PARange */ -#define TCR_PS_CELL \ - ({ unsigned int ret = 0; \ - switch (cpu_parange) { \ - case 32: ret = PARANGE_32B; break; \ - case 36: ret = PARANGE_36B; break; \ - case 40: ret = PARANGE_40B; break; \ - case 42: ret = PARANGE_42B; break; \ - case 44: ret = PARANGE_44B; break; \ - case 48: ret = PARANGE_48B; break; \ - } \ - ret; }) - #define VTCR_CELL (T0SZ_CELL | (SL0_CELL << TCR_SL0_SHIFT)\ | (TCR_RGN_WB_WA << TCR_IRGN0_SHIFT) \ | (TCR_RGN_WB_WA << TCR_ORGN0_SHIFT) \ | (TCR_INNER_SHAREABLE << TCR_SH0_SHIFT)\ - | (TCR_PS_CELL << TCR_PS_SHIFT) \ + | (cpu_parange_encoded << TCR_PS_SHIFT) \ | VTCR_RES1) int arm_paging_cell_init(struct cell *cell); diff --git a/hypervisor/arch/arm64/paging.c b/hypervisor/arch/arm64/paging.c index 2942b8d7..3a4eb096 100644 --- a/hypervisor/arch/arm64/paging.c +++ b/hypervisor/arch/arm64/paging.c @@ -14,6 +14,8 @@ #include <jailhouse/percpu.h> #include <asm/paging.h> +unsigned int cpu_parange_encoded; + /** * Return the physical address bits. * @@ -24,10 +26,11 @@ */ unsigned int get_cpu_parange(void) { - /* Largest supported value (for 4K paging) */ - unsigned int parange = PARANGE_48B; unsigned int cpu; + /* Largest supported value (for 4K paging) */ + cpu_parange_encoded = PARANGE_48B; + /* * early_init calls paging_init, which will indirectly call * get_cpu_parange, prior to cell_init, we cannot use @@ -36,10 +39,10 @@ unsigned int get_cpu_parange(void) */ for (cpu = 0; cpu < system_config->root_cell.cpu_set_size * 8; cpu++) if (cpu_id_valid(cpu) && - (per_cpu(cpu)->id_aa64mmfr0 & 0xf) < parange) - parange = per_cpu(cpu)->id_aa64mmfr0 & 0xf; + (per_cpu(cpu)->id_aa64mmfr0 & 0xf) < cpu_parange_encoded) + cpu_parange_encoded = per_cpu(cpu)->id_aa64mmfr0 & 0xf; - switch (parange) { + switch (cpu_parange_encoded) { case PARANGE_32B: return 32; case PARANGE_36B: -- 2.26.2 -- You received this message because you are subscribed to the Google Groups "Jailhouse" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. To view this discussion on the web visit https://groups.google.com/d/msgid/jailhouse-dev/bf6c27cec715beb6960459d287651965655f9c93.1602664150.git.jan.kiszka%40siemens.com.
