Hello Jailhouse Community,
I am trying to enable Jaihouse on NXP ls1046a platform which has four ARM
A72 CPU Cores, but now the system hangs after I execute "jailhouse enable
ls1046a.cell".
root@localhost:~/jailhouse/jailhouse# jailhouse enable ls1046a.cell
Initializing Jailhouse hypervisor v0.12 (73-gacdc9fcc-dirty) on CPU 2
Code location: 0x0000ffffc0200800
Page pool usage after early setup: mem 39/992, remap 0/131072
Initializing processors:
CPU 2... OK
CPU 0... OK
CPU 1... OK
CPU 3... OK
Initializing unit: irqchip
Initializing unit: ARM SMMU v3
Initializing unit: ARM SMMU
No SMMU
Initializing unit: PVU IOMMU
Initializing unit: PCI
Adding virtual PCI device 00:00.0 to cell "ls1046"
Adding virtual PCI device 00:01.0 to cell "ls1046"
Page pool usage after late setup: mem 62/992, remap 5/131072
Activating hypervisor
WARN: unknown SGI received 5
WARN: unknown SGI received 5
//Linux hang here.
After did some debuging, I found the issue is with the followng calling.
on_each_cpu(enter_hypervisor, header, 0);
The following is definition of on_each_cpu.
611 void on_each_cpu(void (*func) (void *info), void *info, int wait)
612 {
613 unsigned long flags;
614
615 preempt_disable();
616 smp_call_function(func, info, wait);
617 local_irq_save(flags);
618 func(info);
//Can panic here if call panic("return from hypervisor\n");
619 local_irq_restore(flags);
//System hang and can't panic here if call panic("return from
hypervisor\n");
620 preempt_enable();
621 }
622 EXPORT_SYMBOL(on_each_cpu);
I found the system hangs just after execute local_irq_restore(flags),
because the system can panic if I call panic() just before
local_irq_restore(), but can't panic if add panic() just after
local_irq_restore().
I attached ls1046a.c.
I am a newbies of Jailhouse, how to debug such issue? any comments or
suggestion is Welcome, thanks.
--
You received this message because you are subscribed to the Google Groups
"Jailhouse" group.
To unsubscribe from this group and stop receiving emails from it, send an email
to [email protected].
To view this discussion on the web visit
https://groups.google.com/d/msgid/jailhouse-dev/58057754-ee40-4583-bd44-db19a6706069n%40googlegroups.com.
/*
* ls1046a target - linux-demo
*
* Copyright 2020 NXP
*
* Authors:
* Jiafei Pan <[email protected]>
*
* This work is licensed under the terms of the GNU GPL, version 2. See
* the COPYING file in the top-level directory.
*/
#include <jailhouse/types.h>
#include <jailhouse/cell-config.h>
struct {
struct jailhouse_system header;
__u64 cpus[1];
struct jailhouse_memory mem_regions[16];
struct jailhouse_irqchip irqchips[2];
struct jailhouse_pci_device pci_devices[2];
} __attribute__((packed)) config = {
.header = {
.signature = JAILHOUSE_SYSTEM_SIGNATURE,
.revision = JAILHOUSE_CONFIG_REVISION,
.flags = JAILHOUSE_SYS_VIRTUAL_DEBUG_CONSOLE,
.hypervisor_memory = {
.phys_start = 0xfba00000,
.size = 0x00400000,
},
.debug_console = {
.address = 0x21c0500,
.size = 0x100,
.type = JAILHOUSE_CON_TYPE_8250,
.flags = JAILHOUSE_CON_ACCESS_MMIO |
JAILHOUSE_CON_REGDIST_1,
},
.platform_info = {
.pci_mmconfig_base = 0xfb500000,
.pci_mmconfig_end_bus = 0,
.pci_is_virtual = 1,
.pci_domain = -1,
.arm = {
.gic_version = 2,
.gicd_base = 0x1410000,
.gicc_base = 0x142f000,
.gich_base = 0x1440000,
.gicv_base = 0x146f000,
.maintenance_irq = 25,
},
},
.root_cell = {
.name = "ls1046",
.num_pci_devices = ARRAY_SIZE(config.pci_devices),
.cpu_set_size = sizeof(config.cpus),
.num_memory_regions = ARRAY_SIZE(config.mem_regions),
.num_irqchips = ARRAY_SIZE(config.irqchips),
.vpci_irq_base = 102-32, /* Not include 32 base */
},
},
.cpus = {
0xf,
},
.mem_regions = {
/* IVHSMEM shared memory region for 00:00.0 */ {
.phys_start = 0xfb700000,
.virt_start = 0xfb700000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ,
},
{
.phys_start = 0xfb701000,
.virt_start = 0xfb701000,
.size = 0x9000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
{
.phys_start = 0xfb70a000,
.virt_start = 0xfb70a000,
.size = 0x2000,
.flags = JAILHOUSE_MEM_READ,
},
{
.phys_start = 0xfb70c000,
.virt_start = 0xfb70c000,
.size = 0x2000,
.flags = JAILHOUSE_MEM_READ,
},
{
.phys_start = 0xfb70e000,
.virt_start = 0xfb70e000,
.size = 0x2000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* IVSHMEM shared memory regions for 00:01.0 (networking) */
JAILHOUSE_SHMEM_NET_REGIONS(0xfb800000, 1),
/* RAM - 1GB - root cell */ {
.phys_start = 0x80000000,
.virt_start = 0x80000000,
.size = 0x40000000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE,
},
/* RAM: Inmate */ {
.phys_start = 0xc0000000,
.virt_start = 0xc0000000,
.size = 0x3b500000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE,
},
/* RAM: loader */ {
.phys_start = 0xbf900000,
.virt_start = 0xbf900000,
.size = 0x00100000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE,
},
/* duart1 */ {
.phys_start = 0x021c0000,
.virt_start = 0x021c0000,
.size = 0x10000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* duart2 */ {
.phys_start = 0x021d0000,
.virt_start = 0x021d0000,
.size = 0x10000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* CCSR */ {
.phys_start = 0x01000000,
.virt_start = 0x01000000,
.size = 0x0f000000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* DCSR */ {
.phys_start = 0x20000000,
.virt_start = 0x20000000,
.size = 0x04000000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
},
.irqchips = {
/* GIC */ {
.address = 0x1410000,
.pin_base = 32,
.pin_bitmap = {
0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
},
},
/* GIC */ {
.address = 0x1410000,
.pin_base = 160,
.pin_bitmap = {
0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
},
},
},
.pci_devices = {
{ /* IVSHMEM 00:00.0 (demo) */
.type = JAILHOUSE_PCI_TYPE_IVSHMEM,
.domain = 0,
.bdf = 0 << 3,
.bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX,
.shmem_regions_start = 0,
.shmem_dev_id = 0,
.shmem_peers = 3,
.shmem_protocol = JAILHOUSE_SHMEM_PROTO_UNDEFINED,
},
{ /* IVSHMEM 00:01.0 (networking) */
.type = JAILHOUSE_PCI_TYPE_IVSHMEM,
.domain = 0,
.bdf = 1 << 3,
.bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX,
.shmem_regions_start = 5,
.shmem_dev_id = 0,
.shmem_peers = 2,
.shmem_protocol = JAILHOUSE_SHMEM_PROTO_VETH,
},
},
};
