Hi,
I'm continuing the work and refine my cell description (not perfect but
trying ). pls see the attached.
But it still cause panic and I notice it happend in
jailhouse/driver/main.c:492 -
"
memcpy(hypervisor_mem, hypervisor->data, hypervisor->size);
"
checked my setting -
" .hypervisor_memory = {
.phys_start = 0x800000000,
.size = 0x000400000,
},
"
Is it the problem? my physical ddr is 4g add linux cmd_line "mem=1024M".
Sorry I can't find the guidance/ document for it.
Any advice is welcome.
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/*
* Jailhouse, a Linux-based partitioning hypervisor
*
* Configuration for Xilinx ZynqMP ZCU102 eval board
*
* Copyright (c) Siemens AG, 2016
*
* Authors:
* Jan Kiszka <[email protected]>
*
* This work is licensed under the terms of the GNU GPL, version 2. See
* the COPYING file in the top-level directory.
*
* Reservation via device tree: 0x800000000..0x83fffffff
*/
/*
* copy from zcu102 board setting and here's the configuration for socfpga stratix10
* KFC <[email protected]>
*/
#include <jailhouse/types.h>
#include <jailhouse/cell-config.h>
struct {
struct jailhouse_system header;
__u64 cpus[1];
struct jailhouse_memory mem_regions[7];
struct jailhouse_irqchip irqchips[1];
} __attribute__((packed)) config = {
.header = {
.signature = JAILHOUSE_SYSTEM_SIGNATURE,
.revision = JAILHOUSE_CONFIG_REVISION,
.flags = JAILHOUSE_SYS_VIRTUAL_DEBUG_CONSOLE,
.hypervisor_memory = {
.phys_start = 0x800000000,
.size = 0x000400000,
},
.debug_console = {
.address = 0xffc02000,
.size = 0x1000,
.type = JAILHOUSE_CON_TYPE_8250,
.flags = JAILHOUSE_CON_ACCESS_MMIO |
JAILHOUSE_CON_REGDIST_4,
},
.platform_info = {
.arm = {
.gic_version = 2,
.gicd_base = 0xfffc1000,
.gicc_base = 0xfffc2000,
.gich_base = 0xfffc4000,
.gicv_base = 0xfffc6000,
.maintenance_irq = 25,
},
},
.root_cell = {
.name = "Stratix10-SoCfpga-SoCdk",
.cpu_set_size = sizeof(config.cpus),
.num_memory_regions = ARRAY_SIZE(config.mem_regions),
.num_irqchips = ARRAY_SIZE(config.irqchips),
.num_pci_devices = 0,
},
},
.cpus = {
0xf,
},
.mem_regions = {
/* RAM */ {
.phys_start = 0x0,
.virt_start = 0x0,
.size = 0x80000000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE,
},
/* FPGA 1.5GB */ {
.phys_start = 0x80000000,
.virt_start = 0x80000000,
.size = 0x60000000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE,
},
/* DEVICE 142MB */ {
.phys_start = 0xF7000000,
.virt_start = 0xF7000000,
.size = 0x08E00000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE,
},
/* OCRAM 1MB but available 256KB */ {
.phys_start = 0xFFE00000,
.virt_start = 0xFFE00000,
.size = 0x00100000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE,
},
/* DEVICE 32KB */ {
.phys_start = 0xFFFC0000,
.virt_start = 0xFFFC0000,
.size = 0x00008000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE,
},
/* MEM 124GB */ {
.phys_start = 0x0100000000,
.virt_start = 0x0100000000,
.size = 0x1F00008000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE,
},
/* DEVICE 4GB */ {
.phys_start = 0x2000000000,
.virt_start = 0x2000000000,
.size = 0x0100008000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE,
},
},
.irqchips = {
/* GIC */ {
.address = 0xfffc1000,
.pin_base = 32,
.pin_bitmap = {
0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
},
},
},
};
