From: "hongbo.wang" <[email protected]> Add root cell, inmate cell, and Linux demo cell configure files for NXP ls1043a RDB platform.
GIC base address of Rev1.1 are different with Rev1.0, default configure files are for ls1043a RDB Rev1.1, if want to run jailhouse on Rev1.0, should change to the following: .gicd_base = 0x1401000, .gicc_base = 0x1402000, .gich_base = 0x1404000, .gicv_base = 0x1406000, /* irqchips GIC-400*/ .address = 0x1401000, Signed-off-by: hongbo.wang <[email protected]> --- configs/arm64/ls1043a-rdb-inmate-demo.c | 138 +++++++ configs/arm64/ls1043a-rdb-linux-demo.c | 165 ++++++++ configs/arm64/ls1043a-rdb.c | 496 ++++++++++++++++++++++++ 3 files changed, 799 insertions(+) create mode 100644 configs/arm64/ls1043a-rdb-inmate-demo.c create mode 100644 configs/arm64/ls1043a-rdb-linux-demo.c create mode 100644 configs/arm64/ls1043a-rdb.c diff --git a/configs/arm64/ls1043a-rdb-inmate-demo.c b/configs/arm64/ls1043a-rdb-inmate-demo.c new file mode 100644 index 00000000..25645745 --- /dev/null +++ b/configs/arm64/ls1043a-rdb-inmate-demo.c @@ -0,0 +1,138 @@ +/* + * ls1043a RDB - inmate demo + * + * Copyright NXP 2020 + * + * Authors: + * Hongbo Wang <[email protected]> + * + * This work is licensed under the terms of the GNU GPL, version 2. See + * the COPYING file in the top-level directory. + */ + +#include <jailhouse/types.h> +#include <jailhouse/cell-config.h> + +struct { + struct jailhouse_cell_desc cell; + __u64 cpus[1]; + struct jailhouse_memory mem_regions[8]; + struct jailhouse_irqchip irqchips[2]; + struct jailhouse_pci_device pci_devices[1]; +} __attribute__((packed)) config = { + .cell = { + .signature = JAILHOUSE_CELL_DESC_SIGNATURE, + .revision = JAILHOUSE_CONFIG_REVISION, + .name = "inmate-demo", + .flags = JAILHOUSE_CELL_PASSIVE_COMMREG, + + .cpu_set_size = sizeof(config.cpus), + .num_memory_regions = ARRAY_SIZE(config.mem_regions), + .num_irqchips = ARRAY_SIZE(config.irqchips), + .num_pci_devices = ARRAY_SIZE(config.pci_devices), + .vpci_irq_base = 60 - 32, /* vPCI INTx */ + + .console = { + .address = 0x21c0600, /* Uart1 in DUART1 */ + .divider = 0xd9, /* baudrate: 115200 */ + .type = JAILHOUSE_CON_TYPE_8250, + .flags = JAILHOUSE_CON_ACCESS_MMIO | + JAILHOUSE_CON_REGDIST_1, + }, + }, + + .cpus = { + 0x2, + }, + + .mem_regions = { + /* IVSHMEM shared memory region for 00:00.0 */ { + .phys_start = 0xc0500000, + .virt_start = 0xc0500000, + .size = 0x1000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED, + }, + { + .phys_start = 0xc0501000, + .virt_start = 0xc0501000, + .size = 0x9000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_ROOTSHARED, + }, + { + .phys_start = 0xc050a000, + .virt_start = 0xc050a000, + .size = 0x2000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED, + }, + { + .phys_start = 0xc050c000, + .virt_start = 0xc050c000, + .size = 0x2000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_ROOTSHARED, + }, + { + .phys_start = 0xc050e000, + .virt_start = 0xc050e000, + .size = 0x2000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED, + }, + /* DUART1 */ { + .phys_start = 0x21c0000, + .virt_start = 0x21c0000, + .size = 0x10000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO | JAILHOUSE_MEM_ROOTSHARED, + }, + /* RAM: Top at 2GB DRAM1 Space */ { + .phys_start = 0xc0900000, + .virt_start = 0, + .size = 0x00010000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE, + }, + /* communication region */ { + .virt_start = 0x80000000, + .size = 0x00001000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_COMM_REGION, + }, + }, + + .irqchips = { + /* GIC-400 */ { + .address = 0x1410000, + .pin_base = 32, + .pin_bitmap = { + 1 << (60 - 32), /* vPCI */ + 0, + 0, + 0, + }, + }, + /* GIC-400 */ { + .address = 0x1410000, + .pin_base = 160, + .pin_bitmap = { + 0, + 0, + 0, + 0, + }, + }, + }, + + .pci_devices = { + { /* IVSHMEM 00:00.0 (demo) */ + .type = JAILHOUSE_PCI_TYPE_IVSHMEM, + .domain = 0, + .bdf = 0 << 3, + .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX, + .shmem_regions_start = 0, + .shmem_dev_id = 1, + .shmem_peers = 1, + .shmem_protocol = JAILHOUSE_SHMEM_PROTO_UNDEFINED, + }, + }, +}; diff --git a/configs/arm64/ls1043a-rdb-linux-demo.c b/configs/arm64/ls1043a-rdb-linux-demo.c new file mode 100644 index 00000000..afc10ede --- /dev/null +++ b/configs/arm64/ls1043a-rdb-linux-demo.c @@ -0,0 +1,165 @@ +/* + * ls1043a RDB target - linux-demo + * + * Copyright 2020 NXP + * + * Authors: + * Hongbo Wang <[email protected]> + * + * This work is licensed under the terms of the GNU GPL, version 2. See + * the COPYING file in the top-level directory. + */ + +#include <jailhouse/types.h> +#include <jailhouse/cell-config.h> + +struct { + struct jailhouse_cell_desc cell; + __u64 cpus[1]; + struct jailhouse_memory mem_regions[16]; + struct jailhouse_irqchip irqchips[2]; + struct jailhouse_pci_device pci_devices[2]; +} __attribute__((packed)) config = { + .cell = { + .signature = JAILHOUSE_CELL_DESC_SIGNATURE, + .revision = JAILHOUSE_CONFIG_REVISION, + .name = "linux-inmate-demo", + .flags = JAILHOUSE_CELL_PASSIVE_COMMREG, + + .cpu_set_size = sizeof(config.cpus), + .num_memory_regions = ARRAY_SIZE(config.mem_regions), + .num_irqchips = ARRAY_SIZE(config.irqchips), + .num_pci_devices = ARRAY_SIZE(config.pci_devices), + .vpci_irq_base = 60 - 32, /* vPCI INTx: 60,61,62,63 */ + }, + + .cpus = { + 0xc, + }, + + .mem_regions = { + /* IVSHMEM shared memory region for 00:00.0 */ { + .phys_start = 0xc0500000, + .virt_start = 0xc0500000, + .size = 0x1000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED, + }, + { + .phys_start = 0xc0501000, + .virt_start = 0xc0501000, + .size = 0x9000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_ROOTSHARED, + }, + { + .phys_start = 0xc050a000, + .virt_start = 0xc050a000, + .size = 0x2000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED, + }, + { + .phys_start = 0xc050c000, + .virt_start = 0xc050c000, + .size = 0x2000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED, + }, + { + .phys_start = 0xc050e000, + .virt_start = 0xc050e000, + .size = 0x2000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_ROOTSHARED, + }, + /* IVSHMEM shared memory regions for 00:01.0 (networking) */ + JAILHOUSE_SHMEM_NET_REGIONS(0xc0600000, 1), + /* DUART1 */ { + .phys_start = 0x21c0000, + .virt_start = 0x21c0000, + .size = 0x1000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO | JAILHOUSE_MEM_ROOTSHARED, + }, + /* clockgen */ { + .phys_start = 0x01ee1000, + .virt_start = 0x01ee1000, + .size = 0x1000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO | JAILHOUSE_MEM_ROOTSHARED, + }, + /* dcfg */ { + .phys_start = 0x01ee0000, + .virt_start = 0x01ee0000, + .size = 0x1000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* RAM */ { + .phys_start = 0xc0400000, + .virt_start = 0, + .size = 0x00010000, /* 64K */ + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE, + }, + /* RAM: Top at DRAM1 2GB Space */ { + .phys_start = 0xc0900000, + .virt_start = 0xc0900000, + .size = 0x33700000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA | + JAILHOUSE_MEM_LOADABLE, + }, + /* communication region */ { + .virt_start = 0x80000000, + .size = 0x00001000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_COMM_REGION, + }, + }, + + .irqchips = { + /* GIC-400 */ { + .address = 0x1410000, + .pin_base = 32, + .pin_bitmap = { + 1 << (60 -32) | 1 << (61 - 32) | + 1 << (62 - 32) | 1 << (63 -32), /* vPCI */ + 0, + 0, + 0, + }, + }, + /* GIC-400 */ { + .address = 0x1410000, + .pin_base = 160, + .pin_bitmap = { + 0, + 0, + 0, + 0, + }, + }, + }, + + .pci_devices = { + { /* IVSHMEM 00:00.0 (demo) */ + .type = JAILHOUSE_PCI_TYPE_IVSHMEM, + .domain = 0, + .bdf = 0 << 3, + .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX, + .shmem_regions_start = 0, + .shmem_dev_id = 2, + .shmem_peers = 3, + .shmem_protocol = JAILHOUSE_SHMEM_PROTO_UNDEFINED, + }, + { /* IVSHMEM 00:01.0 (networking) */ + .type = JAILHOUSE_PCI_TYPE_IVSHMEM, + .domain = 0, + .bdf = 1 << 3, + .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX, + .shmem_regions_start = 5, + .shmem_dev_id = 1, + .shmem_peers = 2, + .shmem_protocol = JAILHOUSE_SHMEM_PROTO_VETH, + }, + }, +}; diff --git a/configs/arm64/ls1043a-rdb.c b/configs/arm64/ls1043a-rdb.c new file mode 100644 index 00000000..892dc444 --- /dev/null +++ b/configs/arm64/ls1043a-rdb.c @@ -0,0 +1,496 @@ +/* + * ls1043a RDB target - linux-demo + * + * Copyright 2020 NXP + * + * Authors: + * Hongbo Wang <[email protected]> + * + * This work is licensed under the terms of the GNU GPL, version 2. See + * the COPYING file in the top-level directory. + */ + +#include <jailhouse/types.h> +#include <jailhouse/cell-config.h> + +struct { + struct jailhouse_system header; + __u64 cpus[1]; + struct jailhouse_memory mem_regions[61]; + struct jailhouse_irqchip irqchips[2]; + struct jailhouse_pci_device pci_devices[2]; +} __attribute__((packed)) config = { + .header = { + .signature = JAILHOUSE_SYSTEM_SIGNATURE, + .revision = JAILHOUSE_CONFIG_REVISION, + .flags = JAILHOUSE_SYS_VIRTUAL_DEBUG_CONSOLE, + .hypervisor_memory = { + .phys_start = 0xc0000000, + .size = 0x00400000, + }, + .debug_console = { + .address = 0x21c0500, /* Uart0 in DUART1 */ + .size = 0x100, + .type = JAILHOUSE_CON_TYPE_8250, + .flags = JAILHOUSE_CON_ACCESS_MMIO | + JAILHOUSE_CON_REGDIST_1, + }, + .platform_info = { + .pci_mmconfig_base = 0xc0700000, + .pci_mmconfig_end_bus = 0, + .pci_is_virtual = 1, + .pci_domain = -1, + + .arm = { + .gic_version = 2, + .gicd_base = 0x1410000, + .gicc_base = 0x142f000, + .gich_base = 0x1440000, + .gicv_base = 0x146f000, + .maintenance_irq = 25, + }, + }, + .root_cell = { + .name = "ls1043a", + .num_pci_devices = ARRAY_SIZE(config.pci_devices), + .cpu_set_size = sizeof(config.cpus), + .num_memory_regions = ARRAY_SIZE(config.mem_regions), + .num_irqchips = ARRAY_SIZE(config.irqchips), + .vpci_irq_base = 67 - 32, /* Not include 32 base */ + }, + }, + + .cpus = { + 0xf, + }, + + .mem_regions = { + /* IVSHMEM shared memory region for 00:00.0 */ { + .phys_start = 0xc0500000, + .virt_start = 0xc0500000, + .size = 0x1000, + .flags = JAILHOUSE_MEM_READ, + }, + { + .phys_start = 0xc0501000, + .virt_start = 0xc0501000, + .size = 0x9000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE, + }, + { + .phys_start = 0xc050a000, + .virt_start = 0xc050a000, + .size = 0x2000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE, + }, + { + .phys_start = 0xc050c000, + .virt_start = 0xc050c000, + .size = 0x2000, + .flags = JAILHOUSE_MEM_READ, + }, + { + .phys_start = 0xc050e000, + .virt_start = 0xc050e000, + .size = 0x2000, + .flags = JAILHOUSE_MEM_READ, + }, + /* IVSHMEM shared memory regions for 00:01.0 (networking) */ + JAILHOUSE_SHMEM_NET_REGIONS(0xc0600000, 0), + /* RAM - 1GB at DRAM1 region - root cell */ { + .phys_start = 0x80000000, + .virt_start = 0x80000000, + .size = 0x40000000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_EXECUTE, + }, + /* DRAM2 6GB */ { + .phys_start = 0x880000000, + .virt_start = 0x880000000, + .size = 0x180000000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_EXECUTE, + }, + /* RAM: Inmate */ { + .phys_start = 0xc0900000, + .virt_start = 0xc0900000, + .size = 0x33700000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_EXECUTE, + }, + /* RAM: loader */ { + .phys_start = 0xc0400000, + .virt_start = 0xc0400000, + .size = 0x00100000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_EXECUTE, + }, + /* DDR memory controller */ { + .phys_start = 0x01080000, + .virt_start = 0x01080000, + .size = 0x1000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* IFC */ { + .phys_start = 0x01530000, + .virt_start = 0x01530000, + .size = 0x10000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* QSPI */ { + .phys_start = 0x01550000, + .virt_start = 0x01550000, + .size = 0x10000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* esdhc */ { + .phys_start = 0x01560000, + .virt_start = 0x01560000, + .size = 0x10000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* scfg */ { + .phys_start = 0x01570000, + .virt_start = 0x01570000, + .size = 0x10000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* crypto */ { + .phys_start = 0x01700000, + .virt_start = 0x01700000, + .size = 0x100000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* qman */ { + .phys_start = 0x01880000, + .virt_start = 0x01880000, + .size = 0x10000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* bman */ { + .phys_start = 0x01890000, + .virt_start = 0x01890000, + .size = 0x10000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* fman */ { + .phys_start = 0x01a00000, + .virt_start = 0x01a00000, + .size = 0x100000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* qportals CE */ { + .phys_start = 0x500000000, + .virt_start = 0x500000000, + .size = 0x4000000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE, + }, + /* qportals CI */ { + .phys_start = 0x504000000, + .virt_start = 0x504000000, + .size = 0x4000000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* bportals CE */ { + .phys_start = 0x508000000, + .virt_start = 0x508000000, + .size = 0x4000000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE, + }, + /* bportals CI */ { + .phys_start = 0x50c000000, + .virt_start = 0x50c000000, + .size = 0x4000000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* dcfg */ { + .phys_start = 0x01ee0000, + .virt_start = 0x01ee0000, + .size = 0x1000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* clockgen */ { + .phys_start = 0x01ee1000, + .virt_start = 0x01ee1000, + .size = 0x1000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* rcpm */ { + .phys_start = 0x01ee2000, + .virt_start = 0x01ee2000, + .size = 0x1000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* tmu */ { + .phys_start = 0x01f00000, + .virt_start = 0x01f00000, + .size = 0x10000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* dspi */ { + .phys_start = 0x02100000, + .virt_start = 0x02100000, + .size = 0x10000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* i2c0 */ { + .phys_start = 0x02180000, + .virt_start = 0x02180000, + .size = 0x10000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* i2c1 */ { + .phys_start = 0x02190000, + .virt_start = 0x02190000, + .size = 0x10000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* i2c2 */ { + .phys_start = 0x021a0000, + .virt_start = 0x021a0000, + .size = 0x10000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* i2c3 */ { + .phys_start = 0x021b0000, + .virt_start = 0x021b0000, + .size = 0x10000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* duart1 */ { + .phys_start = 0x021c0000, + .virt_start = 0x021c0000, + .size = 0x10000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* duart2 */ { + .phys_start = 0x021d0000, + .virt_start = 0x021d0000, + .size = 0x10000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* gpio0 */ { + .phys_start = 0x02300000, + .virt_start = 0x02300000, + .size = 0x10000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* gpio1 */ { + .phys_start = 0x02310000, + .virt_start = 0x02310000, + .size = 0x10000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* gpio2 */ { + .phys_start = 0x02320000, + .virt_start = 0x02320000, + .size = 0x10000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* gpio3 */ { + .phys_start = 0x02330000, + .virt_start = 0x02330000, + .size = 0x10000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* lpuart0 */ { + .phys_start = 0x02950000, + .virt_start = 0x02950000, + .size = 0x1000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* lpuart1 */ { + .phys_start = 0x02960000, + .virt_start = 0x02960000, + .size = 0x1000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* lpuart2 */ { + .phys_start = 0x02970000, + .virt_start = 0x02970000, + .size = 0x1000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* lpuart3 */ { + .phys_start = 0x02980000, + .virt_start = 0x02980000, + .size = 0x1000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* lpuart4 */ { + .phys_start = 0x02990000, + .virt_start = 0x02990000, + .size = 0x1000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* lpuart5 */ { + .phys_start = 0x029a0000, + .virt_start = 0x029a0000, + .size = 0x1000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* wdog0 */ { + .phys_start = 0x02ad0000, + .virt_start = 0x02ad0000, + .size = 0x10000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* edma0 */ { + .phys_start = 0x02c00000, + .virt_start = 0x02c00000, + .size = 0x30000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* usb0 */ { + .phys_start = 0x02f00000, + .virt_start = 0x02f00000, + .size = 0x100000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* usb1 */ { + .phys_start = 0x03000000, + .virt_start = 0x03000000, + .size = 0x100000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* usb2 */ { + .phys_start = 0x03100000, + .virt_start = 0x03100000, + .size = 0x100000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* sata */ { + .phys_start = 0x03200000, + .virt_start = 0x03200000, + .size = 0x10000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* pcie0 */ { + .phys_start = 0x03400000, + .virt_start = 0x03400000, + .size = 0x10000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* pcie1 */ { + .phys_start = 0x03500000, + .virt_start = 0x03500000, + .size = 0x10000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* pcie2 */ { + .phys_start = 0x03600000, + .virt_start = 0x03600000, + .size = 0x10000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* pcie2 pf0 */ { + .phys_start = 0x036c0000, + .virt_start = 0x036c0000, + .size = 0x10000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* PCI host bridge 0 */ { + .phys_start = 0x4000000000, + .virt_start = 0x4000000000, + .size = 0x800000000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* PCI host bridge 1 */ { + .phys_start = 0x4800000000, + .virt_start = 0x4800000000, + .size = 0x800000000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* PCI host bridge 2 */ { + .phys_start = 0x5000000000, + .virt_start = 0x5000000000, + .size = 0x800000000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + }, + + .irqchips = { + /* GIC */ { + .address = 0x1410000, + .pin_base = 32, + .pin_bitmap = { + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff + }, + }, + /* GIC */ { + .address = 0x1410000, + .pin_base = 160, + .pin_bitmap = { + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff + }, + }, + }, + + .pci_devices = { + { /* IVSHMEM 00:00.0 (demo) */ + .type = JAILHOUSE_PCI_TYPE_IVSHMEM, + .domain = 0, + .bdf = 0 << 3, + .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX, + .shmem_regions_start = 0, + .shmem_dev_id = 0, + .shmem_peers = 3, + .shmem_protocol = JAILHOUSE_SHMEM_PROTO_UNDEFINED, + }, + { /* IVSHMEM 00:01.0 (networking) */ + .type = JAILHOUSE_PCI_TYPE_IVSHMEM, + .domain = 0, + .bdf = 1 << 3, + .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX, + .shmem_regions_start = 5, + .shmem_dev_id = 0, + .shmem_peers = 2, + .shmem_protocol = JAILHOUSE_SHMEM_PROTO_VETH, + }, + }, +}; -- 2.17.1 -- You received this message because you are subscribed to the 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