Am Tue, 23 Feb 2021 14:26:32 +0000
schrieb Raimundo Sagarzazu <[email protected]>:

> Yes, I was trying it and it seems that it works.

Tight ... chicken ;)

Henning

> Thankyou,
> 
> Rai.
> 
> De: [email protected] <[email protected]>
> En nombre de Jan Kiszka Enviado el: martes, 23 de febrero de 2021
> 14:21 Para: Raimundo Sagarzazu <[email protected]>;
> [email protected] Asunto: Re: Invalid PCI config write,
> port cfc, size 1, address port: 8000f940
> 
> On 22.02.21 09:27, Raimundo Sagarzazu wrote:
> Hi all,
> 
> I'm trying to give SMbus access to an inmate cell but the system
> hangs on this error: “Invalid PCI config write, port cfc, size 1,
> address port: 8000f940” when I try to load the cell.
> 
> It’s a x86 host and we already have jailhouse running with two inmate
> cells giving access to net devices, sharing memory, etc.
> 
> From "lspci", I have:
> 
>               00:1f.1 SMBus: Intel Corporation Celeron N3350/Pentium
> N4200/Atom E3900 Series SMBus Controller (rev 0b) DeviceName: Onboard
> - Other Subsystem: Intel Corporation Device 7270
>                             Flags: medium devsel, IRQ 20
>                             Memory at 91616000 (64-bit,
> non-prefetchable) [size=256] I/O ports at f040 [size=32]
>                             Kernel driver in use: i801_smbus
> 
> From "jailhouse config create ...":
> 
>               /* MemRegion: 91516000-915160ff : 0000:00:1f.1 */
>               {
>                             .phys_start = 0x91516000,
>                             .virt_start = 0x91516000,
>                             .size = 0x1000,
>                             .flags = JAILHOUSE_MEM_READ |
> JAILHOUSE_MEM_WRITE, },
> ...
>               /* Port I/O: f040-f05f : 0000:00:1f.1 */
>               PIO_RANGE(0xf040, 0x20),
> ...
>               /* PCIDevice: 00:1f.1 */
>               {
>                             .type = JAILHOUSE_PCI_TYPE_DEVICE,
>                             .iommu = 1,
>                             .domain = 0x0,
>                             .bdf = 0xf9,
>                             .bar_mask = {
>                                           0xffffff00, 0xffffffff,
> 0x00000000, 0x00000000, 0xffffffe0, 0x00000000,
>                             },
>                             .caps_start = 0,
>                             .num_caps = 0,
>                             .num_msi_vectors = 0,
>                             .msi_64bits = 0,
>                             .msi_maskable = 0,
>                             .num_msix_vectors = 0,
>                             .msix_region_size = 0x0,
>                             .msix_address = 0x0,
>               },
> 
> First thing I can see is that lspci shows that device's memory region
> is: Memory at 91616000 (64-bit, non-prefetchable) [size=256]
> 
> While "jailhouse config create ..." shows:
>               MemRegion: 91516000-915160ff : 0000:00:1f.1
> 
> Is that correct?
> 
> Anyway, digging in the code I can see that the error comes on
> "hypervisor/pci.c, pci_cfg_write_moderate() ...", when trying to
> access address 0x40 but device has no capabilities.
> 
> Giving access to this device is not a big issue for us because we can
> share "/dev/i2c-0" status over IVshmem but I'd like to known if
> there's something else I can do or it just can't be done.
> 
> 
> This config space register might be a side-band register. You could
> permit access by modelling it like a capability, ie. create one at
> 0x04 of the needed size (at least 1 byte) and with write permissions.
> Cap ID can be 0 or anything else invalid.
> 
> Jan
> 
> 
> --
> 
> Siemens AG, T RDA IOT
> 
> Corporate Competence Center Embedded Linux
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